FDC37M707-MS Standard Microsystems (SMSC), FDC37M707-MS Datasheet - Page 142
FDC37M707-MS
Manufacturer Part Number
FDC37M707-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37M707-MS.pdf
(194 pages)
Specifications of FDC37M707-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Note:
Note:
DMA Channel
Select
Default = 0x04
on Vcc POR or
Reset_Drv
NAME
A DMA channel is activated by setting the DMA Channel Select register to [0x01-0x03] AND :
For the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
For the PP logical device in ECP mode by setting dmaEn, bit D3 of the ecr.
For the UART 2 logical device, by setting the DMA Enable bit.
specification.
DMAREQ pins must tri-state if not used/selected by any Logical Device. Refer to Note A.
REG INDEX
0x74 (R/W)
Bits[2:0] select the DMA Channel.
0x00= Reserved
0x01= DMA1
0x02= DMA2
0x03= DMA3
0x04-0x07= No DMA active
142
DEFINITION
Refer to the IrCC
STATE
C
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