UPD720122GC-9EU-A Renesas Electronics America, UPD720122GC-9EU-A Datasheet - Page 26

• Manufacturer Part Number: UPD720122GC-9EU-A
• Manufacturer: Renesas Electronics America

Specifications of UPD720122GC-9EU-A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

(4) CPU bus DMA transfer
(a) CPU bus DMA single mode read transfer timing
(Overall)
24
T21
T22
T23
T24
T25
T26
T27
T28
T29
T30
T31
T32
T33
T34
EP1_DACKB
RDB
Symbol
EP1_DRQB
D15 to D0
EP1_TCB
EP1_STOPB
Note
Remark It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
Can be input after previous RDB ↑ .
DMA request acknowledge setup time (RDB↓)
DMA request off time (EP1_DACKB↓)
DMA single mode read transfer cycle time
Read command width
Read command inactive time
Read data delay time (RDB↓)
Buffer direction change time (RDB↓)
Read data hold time (RDB↑)
EP1_TCB setup time (RDB↓)
EP1_TCB hold time (RDB↓)
EP1_STOPB delay time (RDB↓)
EP1_STOPB OFF delay time (RDB↑)
DMA request acknowledge hold time (RDB↑)
Undefined
High level
High level
t
21
t
26
t
27
t
22
t
24
t
33
1 cycle
t
t
25
28
t
Parameter
23
Data Sheet S16685EJ3V0DS
Min.
91
57
34
17
0
−
−
−
4
0
−
3
0
−
N − 1 cycle
Typ.
EP1_STOPB is not asserted in the
case of a full packet.
t
31
µ
Note
PD720122
Max.
54
57
14
15
∞
∞
∞
∞
∞
∞
−
−
−
N cycle
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
32