ISP1160BM,518 NXP Semiconductors, ISP1160BM,518 Datasheet - Page 14

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ISP1160BM,518

Manufacturer Part Number
ISP1160BM,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1160BM,518

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
ISP1160-01_7
Product data sheet
8.6.2 Interrupt output pin (INT)
Figure 12
through the HcHardware Configuration register (see
disable or enable the signals.
To program the four configuration modes of the HC’s interrupt output signal (INT), set
InterruptPinTrigger and InterruptOutputPolarity (bits 1 and 2) of the
HcHardwareConfiguration register (20H to read, A0H to write). InterruptPinEnable (bit 0)
is used as the master enable setting for pin INT.
INT has many associated interrupt events as shown as in
Fig 12. Interrupt pin operating modes.
shows these four interrupt configuration modes. They are programmable
INT
INT
INT
INT
Rev. 07 — 29 September 2009
Mode 0 level triggered, active LOW
Mode 1 level triggered, active HIGH
Mode 2 edge triggered, active LOW
Mode 3 edge triggered, active HIGH
166 ns
166 ns
INT active
INT active
INT active
INT active
Section
clear or disable INT
clear or disable INT
Embedded USB host controller
Figure
10.4.1), which is also used to
13.
MGT944
ISP1160/01
© ST-ERICSSON 2009. All rights reserved.
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