MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 627

• Manufacturer Part Number: MC9S12XDT512CAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512CAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

17.3.2.8
Read: Anytime
Write: Anytime
The program page index register allows accessing up to 4 Mbyte of FLASH or ROM in the global memory
map by using the eight page index bits to page 16 Kbyte blocks into the program page window located in
the CPU local memory map from address $8000 to address $BFFF (see
special access to read and write this register during execution of CALL and RTC instructions.
Freescale Semiconductor
Address: 0x0030
Reset
W
R
PIX7
Program Page Index Register (PPAGE)
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Writes to this register using the special access of the CALL and RTC
instructions will be complete before the end of the instruction execution.
1
Bit21
PIX6
1
6
Figure 17-15. Program Page Index Register (PPAGE)
PPAGE Register [7:0]
Figure 17-16. PPAGE Address Mapping
MC9S12XDP512 Data Sheet, Rev. 2.21
PIX5
1
5
Global Address [22:0]
CAUTION
Bit14
PIX4
NOTE
1
4
Bit13
PIX3
Address: CPU Local Address
1
3
Chapter 17 Memory Mapping Control (S12XMMCV2)
Address [13:0]
or BDM Local Address
Figure
PIX2
1
2
1-16). The CPU has a
Bit0
PIX1
1
1
PIX0
0
0
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