SAA7113HV2 NXP Semiconductors, SAA7113HV2 Datasheet - Page 38
SAA7113HV2
Manufacturer Part Number
SAA7113HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7113HV2.pdf
(75 pages)
Specifications of SAA7113HV2
Video Resolution (max)
720Pixels
Pin Count
44
Package Type
PQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
9397 750 14232
Product data sheet
Fig 27. Mode 0; CVBS (automatic gain)
Fig 29. Mode 2; CVBS (automatic gain)
Fig 31. Mode 6; Y + C (gain channel 2 adjusted via
Fig 33. Mode 8; Y + C (gain channel 2 adapted to Y
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
I
set to logic 1 (full luminance bandwidth).
GAI2)
I
set to logic 1 (full luminance bandwidth).
gain)
2
2
C-bus bit BYPS (subaddress 09h, bit 7) should be
C-bus bit BYPS (subaddress 09h, bit 7) should be
Table 29:
Update hysteresis for 9-bit gain
Off
AD2
AD2
AD2
AD2
AD1
AD1
AD1
AD1
1 LSB
2 LSB
3 LSB
Analog control 1 subaddress 02h (D5 and D4) (see
CHROMA
LUMA
CHROMA
LUMA
CHROMA
LUMA
CHROMA
LUMA
mhb341
mhb343
mhb345
mhb347
Rev. 02 — 9 May 2005
Fig 28. Mode 1; CVBS (automatic gain)
Fig 30. Mode 3; CVBS (automatic gain)
Fig 32. Mode 7; Y + C (gain channel 2 adjusted via
Fig 34. Mode 9; Y + C (gain channel 2 adapted to Y
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
AI22
AI21
AI12
AI11
I
set to logic 1 (full luminance bandwidth).
GAI2)
I
set to logic 1 (full luminance bandwidth).
gain)
2
2
C-bus bit BYPS (subaddress 09h, bit 7) should be
C-bus bit BYPS (subaddress 09h, bit 7) should be
Control bits D5 and D4
GUDL1
0
0
1
1
AD2
AD1
AD2
AD1
AD2
AD1
AD2
AD1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Figure
9-bit video input processor
SAA7113H
7)
GUDL0
0
1
0
1
CHROMA
LUMA
CHROMA
LUMA
CHROMA
LUMA
CHROMA
LUMA
mhb342
mhb344
mhb346
mhb348
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