SAA7113HV2 NXP Semiconductors, SAA7113HV2 Datasheet - Page 54
SAA7113HV2
Manufacturer Part Number
SAA7113HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7113HV2.pdf
(75 pages)
Specifications of SAA7113HV2
Video Resolution (max)
720Pixels
Pin Count
44
Package Type
PQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
Table 75:
9397 750 14232
Product data sheet
Subaddress
(hexadecimal)
00
01
02
I
2
C-bus start setup values
9.2.33 Subaddress 61h (read only register)
9.2.34 Subaddress 62h (read only register)
Function
chip version
increment delay
analog input control 1
9.3 I
Table 71:
Table 72:
[1]
Table 73:
Table 74:
The given values force the following behavior of the SAA7113H:
Slicer status bit (subaddress 60h) read only
VPS valid
No VPS in the last frame
VPS detected
Slicer status bit (subaddress 60h) read only
Framing code valid
No framing code in the last frame
Framing code with 1 error detected in the last frame 0
Framing code without errors detected in the last
frame
Slicer status bits
(subaddresses 61h and 62h)
read only
Line number
Slicer status bits (subaddress 62h) read only
Data type according to
2
•
•
•
•
•
C-bus start setup
X = don’t care.
The analog input AI11 expects a signal in CVBS format; analog anti-alias filter and
AGC active
Automatic field detection enabled, PAL BDGHI or NTSC M standard expected
Standard ITU-R BT 656 output format enabled, VBI data slicer disabled (see
Table
Contrast, brightness and saturation control in accordance with ITU standards
Chrominance processing with nominal bandwidth (800 kHz).
75,
Slicer status bit (subaddress 60h) read only
Slicer status bit (subaddress 60h) read only
Slicer status bits (subaddresses 61h and 62h) read only
Slicer status bits (subaddress 62h) read only
Table note
Name
ID07 to ID04
X, X, X, X, IDEL[3:0]
FUSE[1:0], GUDL[1:0], MODE[3:0]
Table 7
[1]
Rev. 02 — 9 May 2005
2)
Subaddress 61h, data bits D4
to D0
LN8 to LN4
Control bit D4
VPSV
0
1
Control bits D6 and D5
FC8V
0
1
Control bits D3 to D0
DT3 to DT0
Values (binary)
7 6 5 4 3 2 1 0
read only
0 0 0 0 1 0 0 0 08
1 1 0 0 0 0 0 0 C0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Subaddress 62h, data bits D7
to D4
LN3 to LN0
9-bit video input processor
SAA7113H
FC7V
0
1
X
[1]
Start
(hexadecimal)
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