SAA7144 NXP Semiconductors, SAA7144 Datasheet - Page 25

• Manufacturer Part Number: SAA7144
• Manufacturer: NXP Semiconductors

Specifications of SAA7144

• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14454
Product data sheet
For each LCR value from 2 to 23 the data type can be programmed individually.
LCR2 to LCR23 refer to line numbers. The selection in LCR24 values is valid for the rest
of the corresponding field. The upper nibble contains the value for field 1 (odd), the lower
nibble for field 2 (even). The relationship between LCR values and line numbers can be
adjusted via VOFF8 to VOFF0 (located in subaddresses 5Bh, bit 4 and 5Ah, bits 7 to 0).
The recommended values are 07h for 50 Hz sources and 0Ah for 60 Hz sources, to
accommodate line number conventions as used for PAL, SECAM and NTSC standards;
see
Some details about data types:
The data type selections by LCR are overruled by setting VIPB (subaddress 11h bit 1) to
logic 1. This setting is mainly intended for device production tests. The VPO-bus carries
the upper or lower 8 bits of the ADC depending on the ADLSB (subaddress 13h bit 7)
setting. The output configuration is done via MODE3 to MODE0 settings (subaddress 02h
bits 3 to 0; see
The SAV/EAV timing reference codes define start and end of valid data regions.
•
•
•
•
Active video (data type 15) component Y-C
line. Format and nominal levels are given in
Test line (data type 6), is similar to decoded Y-C
exceptions:
– vertical filter (chrominance comb filter for NTSC standards, PAL-phase-error
– peaking and chrominance trap are bypassed within the luminance processing, if
This data type is available only in lines with VREF = 0, see I
Table
Raw samples (data type 7) oversampled CVBS-signal for Intercast™ applications;
the data rate is 27 MHz. The horizontal range is programmable via HSB7 to HSB0,
HSS7 to HSS0 and HDEL1 to HDEL0; see
Section 9.3.16
given in
Sliced data (various standards, data types 0 to 5 and 8 to 14). The format is given in
Table
Table 11
correction) within the chrominance processing is disabled
I
be activated for lines containing standard test signals within the vertical blanking
period; currently the most sources do not contain test lines.
2
C-bus bit VBLB is set. This data type is defined for future enhancements; it could
41. Format and nominal levels are given in
20.
Figure 22
to
Table
Table
and
27).
14.
and
Rev. 01 — 21 April 2005
Table
Table
30,
18.
Table 31
and
Table
Section
B
Figure 21
-C
R
B
40. Format and nominal levels are
4 : 2 : 2 signal, 720 active pixels per
Figure 21
-C
Quadruple video input processor
9.3.6,
R
data as in active video, with two
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
and
Section 9.3.7
Table
and
SAA7144HL
2
C-bus detail section,
Table
16.
16.
and
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