SAA7144 NXP Semiconductors, SAA7144 Datasheet - Page 36

• Manufacturer Part Number: SAA7144
• Manufacturer: NXP Semiconductors

Specifications of SAA7144

• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14454
Product data sheet
9.3.1 Subaddress 00h (read only register)
9.3.2 Subaddress 01h
9.3.3 Subaddress 02h
9.3 I
The I
14h to 1Eh, 20h to 3Fh, 5Ch, 5Dh, 5Fh and 63h to FFh are reserved.
Table 25:
Table 26:
The programming of the horizontal increment delay is used to match internal processing
delays to the delay of the ADC. Use recommended position only.
Table 27:
[1]
Function
Chip Version (CV)
Function
No update
Minimum delay
Recommended position 1
Maximum delay
Bit
7 and 6
5 and 4
3 to 0
2
C-bus detail
X = don’t care.
2
C-bus receiver slave address is 48h/49h and 4Ah/4Bh. Subaddresses 05h, 12h,
Symbol
FUSE[1:0]
GUDL[1:0]
MODE[3:0]
Chip version
Horizontal increment delay
Analog control 1 - bit description
Rev. 01 — 21 April 2005
Logic levels
ID07
CV3
IDEL3
1
1
0
Description
analog function select; see
update hysteresis for 9-bit gain; see
channel input selector
00 = amplifier plus anti-alias filter bypassed
01 = amplifier plus anti-alias filter bypassed
10 = amplifier active
11 = amplifier plus anti-alias filter active
00 = off
01 = 1 LSB
10 = 2 LSB
11 = 3 LSB
0000 = select CVBS (automatic gain) from AI11; see
0001 = select CVBS (automatic gain) from AI12; see
XXXX = reserved; see
ID06
CV2
IDEL2
1
1
0
0
Table note 1
Figure 6
Quadruple video input processor
ID05
CV1
IDEL1
1
1
0
0
Figure 7
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SAA7144HL
ID04
CV0
IDEL0
1
0
0
0
Figure 25
Figure 25
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