UJA1065TW/3V3 NXP Semiconductors, UJA1065TW/3V3 Datasheet - Page 34

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UJA1065TW/3V3

Manufacturer Part Number
UJA1065TW/3V3
Description
Network Controller & Processor ICs HI SPEED CAN SYSTEM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1065TW/3V3

Number Of Transceivers
1
Power Down Mode
Standby
Operating Supply Voltage (min)
5.5V
Supply Current
10mA
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Product
Controller Area Network (CAN)
Data Rate
20 Kbps
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
HTSSOP EP
Lead Free Status / RoHS Status
Compliant
Other names
UJA1065TW/3V3,512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1065TW/3V3
Manufacturer:
NXP
Quantity:
4 798
Part Number:
UJA1065TW/3V3
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
NXP Semiconductors
Table 8.
UJA1065_7
Product data sheet
Bit
15 and 14
13
12
11
10 to 7
6 and 5
4
3
2
System Diagnosis register bit description
Symbol
A1, A0
RRS
RO
GSD
CANFD [3:0] CAN Failure Diagnosis
LINFD[1:0]
V3D
V2D
V1D
6.13.5 System Diagnosis register
This register allows diagnosis information to be read back from the SBC. This register can
be read in all modes.
Description
register address
Read Register Select
Read Only
Ground Shift Diagnosis
LIN Failure Diagnosis
V3 Diagnosis
V2 Diagnosis
V1 Diagnosis
Rev. 07 — 25 February 2010
Value
00
1
1
0
1
0
1111
1110
1100
1101
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
11
10
01
00
1
0
1
0
1
0
Function
read System Diagnosis register
read System Diagnosis register without writing to Mode
register
read System Diagnosis register and write to Mode register
system GND shift is outside selected threshold
system GND shift is within selected threshold
pin TXDC is continuously clamped dominant
pin RXDC is continuously clamped dominant
the bus is continuously clamped dominant
pin RXDC is continuously clamped recessive
reserved
reserved
pin CANH is shorted to pin CANL
pin CANL is shorted to V
reserved
CANH is shorted to GND
CANL is shorted to GND
CANH is shorted to V
reserved
reserved
reserved
no failure
TXDL is clamped dominant
LIN is shorted to GND (dominant clamped)
LIN is shorted to VBAT (recessive clamped)
no failure
OK
fail; V3 is disabled due to an overload situation
OK
fail; V2 is disabled due to an overload situation
OK; V1 always above V
fail; V1 was below V
again with read access
High-speed CAN/LIN fail-safe system basis chip
[1]
UV(VFI)
CC
UV(VFI)
, V
CC
since last read access; bit is set
BAT14
, V
BAT14
since last read access
or V
or V
BAT42
UJA1065
© NXP B.V. 2010. All rights reserved.
BAT42
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