MT48LC64M8A2TG-7E:C TR Micron Technology Inc, MT48LC64M8A2TG-7E:C TR Datasheet - Page 66
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MT48LC64M8A2TG-7E:C TR
Manufacturer Part Number
MT48LC64M8A2TG-7E:C TR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC64M8A2TG-7EC_TR.pdf
(68 pages)
Specifications of MT48LC64M8A2TG-7E:C TR
Organization
64Mx8
Density
512Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
125mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Figure 50:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMH
COMMAND
BA0, BA1
A11, A12
A0–A9,
DQM/
CKE
CLK
A10
DQ
WRITE – Full-Page Burst
t CMS
t CKS
Notes:
t AS
t AS
t AS
ACTIVE
BANK
ROW
ROW
T0
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
2.
3. Page left open; no
t CL
t
WR must be satisfied prior to PRECHARGE command.
T1
NOP
t CH
t CMS
COLUMN
t CK
t DS
T2
WRITE
BANK
D
IN
t CMH
t DH
m
m
1
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
66
1,024 (x16) locations within same row
2,048 (x8) locations within same row
4,096 (x4) locations within same row
t DS
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Full page completed
t DS
D
IN
T5
NOP
m + 3
t DH
(
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(
(
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512Mb: x4, x8, x16 SDRAM
(
(
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)
(
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t DS
D
Tn + 1
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate.
Can use BURST TERMINATE
command to stop.
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
BURST TERM
Tn + 2
2, 3
Don’t Care
Tn + 3
NOP