WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 39

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WG82574L S LBA8

Manufacturer Part Number
WG82574L S LBA8
Description
Manufacturer
Intel
Datasheet

Specifications of WG82574L S LBA8

Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Compliant
Interconnects—82574 GbE Controller
3.1.6.1.2
3.1.6.1.3
3.1.7
3.1.7.1
3.1.7.2
Table 23.
Error Pollution
Error pollution can occur if error conditions for a given transaction are not isolated to
the error's first occurrence. If the PHY detects and reports a receiver error, to avoid
having this error propagate and cause subsequent errors at upper layers, the same
packet is not signaled at the data link or transaction layers.
Similarly, when the data link layer detects an error, subsequent errors that occur for the
same packet is not signaled at the transaction layer.
Completion With Unsuccessful Completion Status
A completion with unsuccessful completion status is dropped and not delivered to its
destination. The request that corresponds to the unsuccessful completion is retried by
sending a new request for the undeliverable data.
Link Layer
ACK/NAK Scheme
The 82574 supports two alternative schemes for ACK/NAK rate:
The PCIe Error Recovery bit, loaded from NVM, determines which of the two schemes is
used.
Supported DLLPs
The following DLLPs are supported by the 82574 as a receiver:
DLLPs Received by The 82574
The following DLLPs are supported by the 82574 as a transmitter:
ACK
NAK
PM_Request_Ack
InitFC1-P
InitFC1-NP
InitFC1-Cpl
InitFC2-P
InitFC2-NP
InitFC2-Cpl
UpdateFC-P
UpdateFC-NP
UpdateFC-Cpl
1. ACK/NAK is scheduled for transmission following any TLP.
2. ACK/NAK is scheduled for transmission according to timeouts specified in the PCIe
specification.
Remarks
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
v2v1v0 = 000
Remarks
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