PIC16F1526-I/PT Microchip Technology, PIC16F1526-I/PT Datasheet - Page 81

• Manufacturer Part Number: PIC16F1526-I/PT
• Description: MCU 14KB FLASH 768B RAM 64-TQFP
• Manufacturer: Microchip Technology

Specifications of PIC16F1526-I/PT

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 768 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 9
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-64
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.6.2
The PIE1 register contains the interrupt enable bits, as
shown in
REGISTER 7-2:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TMR1GIE
R/W-0/0
Register
PIE1 REGISTER
TMR1GIE: Timer1 Gate Interrupt Enable bit
1 = Enables the Timer1 Gate Acquisition interrupt
0 = Disables the Timer1 Gate Acquisition interrupt
ADIE: A/D Converter (ADC) Interrupt Enable bit
1 = Enables the ADC interrupt
0 = Disables the ADC interrupt
RC1IE: USART1 Receive Interrupt Enable bit
1 = Enables the USART1 receive interrupt
0 = Disables the USART1 receive interrupt
TX1IE: USART1 Transmit Interrupt Enable bit
1 = Enables the USART1 transmit interrupt
0 = Disables the USART1 transmit interrupt
SSP1IE: Synchronous Serial Port (MSSP1) Interrupt Enable bit
1 = Enables the MSSP1 interrupt
0 = Disables the MSSP1 interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the Timer2 to PR2 match interrupt
0 = Disables the Timer2 to PR2 match interrupt
TMR1IE: Timer1 Overflow Interrupt Enable bit
1 = Enables the Timer1 overflow interrupt
0 = Disables the Timer1 overflow interrupt
7-2.
R/W-0/0
ADIE
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
RC1IE
R/W-0/0
TX1IE
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SSP1IE
Note:
PIC16(L)F1526/27
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
R/W-0/0
CCP1IE
R/W-0/0
TMR2IE
DS41458A-page 81
R/W-0/0
TMR1IE
bit 0