ICS953002CFLFT IDT, Integrated Device Technology Inc, ICS953002CFLFT Datasheet - Page 3

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ICS953002CFLFT

Manufacturer Part Number
ICS953002CFLFT
Description
IC TIMING CTRL HUB P4 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS953002CFLFT

Input
Clock
Output
Clock
Frequency - Max
66MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
66MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
953002CFLFT

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Pin Description (Continued)
0924—11/18/09
PIN #
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
3V66_0
GND3V66
SCLK
GNDPCIEX
PCIEXC5/PCI_PCIEX_STO
P#*
PCIEXT5/CPU_STOP#*
PCIEXC4
PCIEXT4
PCIEXC3
PCIEXT3
VDDPCIEX
GNDPCIEX
PCIEXC2
PCIEXT2
PCIEXC1
PCIEXT1
VDDPCIEX
CPUCLKC2_ITP/PCIEXC0
CPUCLKT2_ITP/PCIEXT0
SDATA
VDDCPU
CPUCLKC1
CPUCLKT1
GNDCPU
CPUCLKC0
CPUCLKT0
IREF
GND
Integrated
Circuit
Systems, Inc.
PIN NAME
TYPE
OUT
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
OUT
PWR
OUT
OUT
PWR
OUT
OUT
PWR
OUT
OUT
OUT
PWR
I/O
IN
3.3V 66.66MHz clock output
Ground pin for the 3.3V 66MHz clocks
Clock pin of SMBus circuitry, 5V tolerant.
Ground pin for the PCI-EX outputs
Complement clock of differential PCI_Express pair. / Active low signal that
stops all PCI and PCIEX clocks besides the free running clocks
True clock of differential PCI_Express pair./Stops all CPUCLK besides the
free running clocks
Complement clock of differential PCI_Express pair.
True clock of differential PCI_Express pair.
Complement clock of differential PCI_Express pair.
True clock of differential PCI_Express pair.
Power supply for PCI Express clocks, nominal 3.3V
Ground pin for the PCI-EX outputs
Complement clock of differential PCI_Express pair.
True clock of differential PCI_Express pair.
Complement clock of differential PCI_Express pair.
True clock of differential PCI_Express pair.
Power supply for PCI Express clocks, nominal 3.3V
Complementary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias./
Complement clock of differential PCIEX pair
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias. / True clock of
differential PCIEX pair
Data pin for SMBus circuitry, 5V tolerant.
Supply for CPU clocks, 3.3V nominal
Complementary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Ground pin for the CPU outputs
Complementary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
This pin establishes the reference current for the differential current-mode
output pairs. This pin requires a fixed precision resistor tied to ground in
order to establish the appropriate current. 475 ohms is the standard value.
Ground pin.
3
DESCRIPTION
ICS953002

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