SI5319C-C-GMR Silicon Laboratories Inc, SI5319C-C-GMR Datasheet - Page 20

• Manufacturer Part Number: SI5319C-C-GMR
• Description: IC CLOCK MULT/ATTENUATOR 36QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5319C-C-GMR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5319
Reset value = 0100 0010
Reset value = 0000 0101
20
Register 2.
Register 3.
Name
Name
Type
Type
7:4
3:0
7:6
3:0
Bit
Bit
Bit
Bit
5
4
BWSEL_REG
Reserved
Reserved
SQ_ICAL
Reserved
FREEZE
Name
Name
VCO_
D7
D7
[3:0]
Reserved
R
BWSEL_REG.
Selects nominal f3dB bandwidth for PLL. See the DSPLLsim for settings. After
BWSEL_REG is written with a new value, an ICAL is required for the change to take
effect.
Reserved.
Reserved.
VCO_FREEZE.
Forces the part into VCO Freeze. This bit overrides all other manual and automatic clock
selection controls.
0: Normal operation.
1: Force VCO Freeze mode. Overrides all other settings and ignores the quality of all of
the input clocks.
SQ_ICAL.
This bit determines if the output clocks will remain enabled or be squelched (disabled)
during an internal calibration. See Table 9 on page 39.
0: Output clocks enabled during ICAL.
1: Output clocks disabled during ICAL.
Reserved.
BWSEL_REG [3:0]
D6
D6
R/W
FREEZE
VCO_
R/W
D5
D5
SQ_ICAL
R/W
D4
D4
Rev. 1.0
Function
Function
D3
D3
D2
D2
Reserved
Reserved
R
R
D1
D1
D0
D0