SI5319C-C-GMR Silicon Laboratories Inc, SI5319C-C-GMR Datasheet - Page 21
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SI5319C-C-GMR
Manufacturer Part Number
SI5319C-C-GMR
Description
IC CLOCK MULT/ATTENUATOR 36QFN
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI5319C-C-GMR.pdf
(50 pages)
Specifications of SI5319C-C-GMR
Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
36-VFQFN Exposed Pad
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset value = 1110 1101
Reset value = 0010 1101
Register 5.
Register 6.
Name
Name
Type
Type
7:6
5:0
7:3
2:0
Bit
Bit
Bit
Bit
ICMOS [1:0]
REG [2:0]
Reserved
Reserved
SFOUT_
Name
Name
D7
D7
ICMOS [1:0]
Reserved
R/W
R
ICMOS [1:0].
When the output buffer is set to CMOS mode, these bits determine the output buffer drive
strength. The first number below refers to 3.3 V operation; the second to 1.8 V operation.
These values assume CKOUT+ is tied to CKOUT-.
00: 8 mA/2 mA.
01: 16 mA/4 mA
10: 24 mA/6 mA
11: 32 mA/ 8mA
Reserved.
Reserved.
SFOUT_REG [2:0].
Controls output signal format and disable for CKOUT output buffer. Bypass mode is not
supported for CMOS output clocks.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
D6
D6
D5
D5
Reserved
D4
D4
Rev. 1.0
R
Function
Function
D3
D3
Reserved
R
D2
D2
SFOUT_REG [2:0]
R/W
D1
D1
Si5319
D0
D0
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