ICS854104AGLF IDT, Integrated Device Technology Inc, ICS854104AGLF Datasheet - Page 2

• Manufacturer Part Number: ICS854104AGLF
• Description: IC FANOUT BUFF DIFF-LVDS 16TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS854104AGLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 700MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 700MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1183; 800-1183-5; 800-1183; 854104AGLF

ICS854104 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Table
Table 3. Output Enable Function Table
ICS854104AG REVISION A AUGUST 14, 2009
Symbol
C
R
R
Number
IN
PULLUP
PULLDOWN
11, 12
13, 14
15, 16
OE[3:0]
9, 10
Inputs
1
2
3
4
5
6
7
8
0
1
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Name
nCLK
GND
OE0
OE1
OE2
CLK
OE3
V
DD
High-Impedance
Q[0:3], nQ[0:3]
Active (default)
Outputs
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Input
Input
Type
Pullup/Pulldown
Pulldown
Pullup
Pullup
Pullup
Pullup
Test Conditions
Description
Output enable pin for Q0, nQ0 outputs. See Table 3. LVCMOS/LVTTL interface
levels.
Output enable pin for Q1, nQ1 outputs. See Table 3. LVCMOS/LVTTL interface
levels.
Output enable pin for Q2, nQ2 outputs. See Table 3. LVCMOS/LVTTL interface
levels.
Positive supply pin.
Power supply ground.
Non-inverting differential clock input.
Inverting differential clock input. V
Output enable pin for Q3, nQ3 outputs. See Table 3. LVCMOS/LVTTL interface
levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
2
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
Minimum
DD
/2 default when left floating.
Typical
51
51
4
©2009 Integrated Device Technology, Inc.
Maximum
Units
k
k
pF
Ω
Ω