AD9512BCPZ Analog Devices Inc, AD9512BCPZ Datasheet - Page 3
AD9512BCPZ
Manufacturer Part Number
AD9512BCPZ
Description
IC CLOCK DIST 5OUT PLL 48LFCSP
Manufacturer
Analog Devices Inc
Type
Fanout Buffer (Distribution), Dividerr
Datasheet
1.AD9512BCPZ-REEL7.pdf
(48 pages)
Specifications of AD9512BCPZ
Number Of Circuits
1
Ratio - Input:output
2:5
Differential - Input:output
Yes/Yes
Input
Clock
Output
CMOS, LVDS, LVPECL
Frequency - Max
1.2GHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
1.2GHz
Clock Ic Type
Clock Distribution
Ic Interface Type
Serial
Frequency
1.2GHz
No. Of Outputs
5
No. Of Multipliers / Dividers
5
Supply Voltage Range
3.135V To 3.465V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9512/PCB - BOARD EVAL CLOCK 5CHAN 48LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9512BCPZ
Manufacturer:
ADI
Quantity:
329
Part Number:
AD9512BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9512BCPZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Outline Dimensions........................................................................46
REVISION HISTORY
6/05—Rev. 0 to Rev. A
Changes to Features ..........................................................................1
Changes to General Description .....................................................1
Changes to Table 1 ............................................................................4
Changes to Table 3 ............................................................................5
Changes to Table 4 ............................................................................7
Changes to Table 5 and Table 6 .....................................................12
Changes to Table 7 ..........................................................................13
Changes to Figure 12 and Figure 14 to Figure 16 .......................21
Changes to Figure 17 Caption .......................................................22
Changes to Figure 23 ......................................................................23
Changes to Divider Phase Offset Section ....................................29
Changes to Chip Power-Down or Sleep Mode—PDB Section .31
Changes to Distribution Power-Down Section...........................31
Changes to Individual Clock Output Power-Down Section .....31
Changes to Individual Circuit Block Power-Down Section ......31
Changes to Soft Reset via the Serial Port Section .......................31
Changes to SYNCB—Hardware SYNC Section..........................32
Changes to Soft SYNC Register 58h<2> Section ........................32
Changes to Multichip Synchronization Section..........................32
LVPECL Clock Distribution......................................................45
LVDS Clock Distribution...........................................................45
Power and Grounding Considerations and Power Supply
Rejection.......................................................................................45
Ordering Guide ...........................................................................46
Rev. A | Page 3 of 48
Changes to Serial Control Port Section .......................................33
Changes to Serial Control Port Pin Descriptions Section .........33
Changes to General Operation of Serial
Control Port Section .......................................................................33
Added Framing a Communication Cycle with CSB Section ....33
Added Communication Cycle—Instruction Plus
Data Section.....................................................................................33
Changes to Write Section...............................................................33
Changes to Read Section................................................................34
Changes to Instruction Word (16 Bits) Section ..........................34
Changes to MSB/LSB First Transfers Section..............................34
Changes to Figure 32 and Figure 36 .............................................35
Added Figure 38; Renumbered Sequentially...............................36
Changes to Table 17 ........................................................................37
Changes to Table 18 ........................................................................39
Changes to Power Supply Section.................................................43
Changes to Power Management Section......................................43
4/05—Revision 0: Initial Version
AD9512