LMK03200ISQE/NOPB National Semiconductor, LMK03200ISQE/NOPB Datasheet - Page 29

IC CLOCK CONDITIONER PREC 48-LLP

LMK03200ISQE/NOPB

Manufacturer Part Number
LMK03200ISQE/NOPB
Description
IC CLOCK CONDITIONER PREC 48-LLP
Manufacturer
National Semiconductor
Type
Clock Conditionerr
Datasheet

Specifications of LMK03200ISQE/NOPB

Pll
Yes
Input
Clock
Output
LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Frequency - Max
1.296GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Frequency-max
1.296GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMK03200ISQETR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMK03200ISQE/NOPB
Manufacturer:
NSC
Quantity:
72
PLL phase detector. Since the VCO Divider is also in the
feedback path from the VCO to the PLL Phase Detector, the
total N divide value, N
vider value. N
frequency is calculated as, f
VCO Divider / PLL R Divider. Since the PLL N divider is a pure
binary counter there are no illegal divide values for PLL_N
[17:0] except for 0.
2.10.2 VCO_DIV [3:0] -- VCO Divider
These bits program the divide value for the VCO Divider. The
VCO Divider follows the VCO output and precedes the clock
distribution blocks. Since the VCO Divider is in the feedback
path from the VCO to the PLL phase detector the VCO Divider
contributes to the total N divide value, N
Divider × VCO Divider. The VCO Divider can not be by-
passed. See the programming section on the PLL N Divider
for more information on setting the VCO frequency.
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
. . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
0
0
0
0
0
0
0
0
1
1
1
.
VCO_DIV [3:0]
Total
0
0
0
0
1
1
1
1
0
0
1
.
PLL_N [17:0]
= PLL N Divider × VCO Divider. The VCO
Total
0
0
1
1
0
0
1
1
0
0
1
.
, is also influenced by the VCO Di-
VCO
= f
0
1
0
1
0
1
0
1
0
1
1
.
OSCin
Total
× PLL N Divider ×
VCO Divider
. N
2 (default)
Invalid
Invalid
Invalid
Invalid
Value
Total
...
(default)
3
4
5
6
7
8
Divider
262143
PLL N
Invalid
Value
760
= PLL N
...
...
1
29
2.10.3 PLL_CP_GAIN [1:0] -- PLL Charge Pump Gain
These bits set the charge pump gain of the PLL.
PLL_CP_GAIN [1:0]
0
1
2
3
Charge Pump Gain
1x (default)
16x
32x
4x
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