IDT82V3380PFG IDT, Integrated Device Technology Inc, IDT82V3380PFG Datasheet - Page 122

• Manufacturer Part Number: IDT82V3380PFG
• Description: IC PLL WAN SYNC ETH 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3380PFG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3380PFG

7.2.6
OPERATING_STS - DPLL Operating Status
Programming Information
IDT82V3380
Address: 52H
Type: Read
Default Value: 10000001
EX_SYNC_ALA
2 - 0
Bit
RM_MON
7
6
5
4
3
7
T0 / T4 DPLL STATE MACHINE CONTROL REGISTERS
T0_DPLL_OPERATING_MODE[2:0]
T0_DPLL_SOFT_FREQ_ALARM
T4_DPLL_SOFT_FREQ_ALARM
EX_SYNC_ALARM_MON
T4_DPLL_LO
T4_DPLL_LOCK
T0_DPLL_LOCK
CK
6
Name
T0_DPLL_SOFT
_FREQ_ALARM
5
This bit indicates whether the frame sync input signal is in external sync alarm status.
0: No external sync alarm.
1: In external sync alarm status. (default)
This bit indicates the T4 DPLL locking status.
0: Unlocked. (default)
1: Locked.
This bit indicates whether the T0 DPLL is in soft alarm status.
0: No T0 DPLL soft alarm. (default)
1: In T0 DPLL soft alarm status.
This bit indicates whether the T4 DPLL is in soft alarm status.
0: No T4 DPLL soft alarm. (default)
1: In T4 DPLL soft alarm status.
This bit indicates the T0 DPLL locking status.
0: Unlocked. (default)
1: Locked.
These bits indicate the current operating mode of T0 DPLL.
000: Reserved.
001: Free-Run. (default)
010: Holdover.
011: Reserved.
100: Locked.
101: Pre-Locked2.
110: Pre-Locked.
111: Lost-Phase.
T4_DPLL_SOFT
_FREQ_ALARM
4
122
T0_DPLL_LO
CK
3
T0_DPLL_OPER
ATING_MODE2
Description
2
SYNCHRONOUS ETHERNET WAN PLL
T0_DPLL_OPER
ATING_MODE1
1
T0_DPLL_OPER
ATING_MODE0
May 19, 2009
0