CY28442ZXC Cypress Semiconductor Corp, CY28442ZXC Datasheet - Page 14

• Manufacturer Part Number: CY28442ZXC
• Description: IC CLOCK GEN ALVISO 56-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Spread Spectrum Clock Generatorr

Specifications of CY28442ZXC

• Pll: Yes with Bypass
• Input: LVTTL, Crystal
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 11:15
• Differential - Input:output: No/Yes
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP II
• Frequency-max: 100MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-07680 Rev. **
PCI_STP# Assertion
The PCI_STP# signal is an active LOW input used for
synchronous stopping and starting the PCI outputs while the
rest of the clock generator continues to function. The set-up
PCI_STP# Deassertion
The deassertion of the PCI_STP# signal will cause all PCI and
stoppable PCIF clocks to resume running in a synchronous
manner within two PCI clock periods after PCI_STP# transi-
tions to a high level.
CPUC(Free Running)
CPUT(Free Running)
CPUC(Stoppable)
CPUT(Stoppable)
CPU_STOP#
SRC 100MHz
SRC 100MHz
PCI_STP#
PCI_STP#
DOT96T
DOT96C
PCI_F
PCI_F
PD
Figure 9. CPU_STP# = Tri-state, CPU_PD = Tri-state, DOT_PD = Tri-state
PCI
PCI
Figure 11. PCI_STP# Deassertion Waveform
Tsu
Tsu
Figure 10. PCI_STP# Assertion Waveform
ADVANCE INFORMATION
Tdrive_SRC
time for capturing PCI_STP# going LOW is 10 ns (t
Figure 10.) The PCIF clocks will not be affected by this pin if
their corresponding control bit in the SMBus register is set to
allow them to be free running.
1.8mS
CY28442
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