CY28442ZXC Cypress Semiconductor Corp, CY28442ZXC Datasheet - Page 8
CY28442ZXC
Manufacturer Part Number
CY28442ZXC
Description
IC CLOCK GEN ALVISO 56-TSSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet
1.CY28442ZXC.pdf
(22 pages)
Specifications of CY28442ZXC
Pll
Yes with Bypass
Input
LVTTL, Crystal
Output
Clock
Number Of Circuits
1
Ratio - Input:output
11:15
Differential - Input:output
No/Yes
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP II
Frequency-max
100MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY28442ZXC-2
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
CY28442ZXC-2T
Manufacturer:
TI
Quantity:
11
Company:
Part Number:
CY28442ZXC-4
Manufacturer:
SEMTEC
Quantity:
946
Document #: 38-07680 Rev. **
Byte 8: Control Register 8 (continued)
Byte 9: Control Register 9
Byte 10: Control Register 10
7
6
5
4
3
2
1
0
3
2
1
0
7
6
5
4
3
Bit
Bit
Bit
@Pup
@Pup
@Pup
0
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
RESERVED
CLKREQ#A
CLKREQ#A
RESERVED
S3
S2
S1
S0
96_100 SEL
96_100 Enable
96_100 SS Enable
96_100 SW HW
RESERVED
CLKREQ#B
CLKREQ#B
RESERVED
CLKREQ#A
Name
Name
Name
ADVANCE INFORMATION
RESERVED
SRC[T/C]4 CLKREQ#A control
1 = SRC[T/C]4 stoppable by CLKREQ#A pin
0 = SRC[T/C]4 not controlled by CLKREQ#A pin
SRC[T/C]2 CLKREQ#A control
1 = SRC[T/C]2 stoppable by CLKREQ#A pin
0 = SRC[T/C]2 not controlled by CLKREQ#A pin
RESERVED
96_100_SSC Spread Spectrum Selection table:
S[3:0] SS%
‘0000’ = -0.8%(Default value)
‘0001’ = -1.0%
‘0010‘ = -1.25%
‘0011‘ = -1.5%
‘0100‘ = -1.75%
‘0101‘ = -2.0%
‘0110‘ = -2.5%
‘0111‘ = -0.5%
‘1000‘ =
‘1001‘ =
‘1010‘ =
‘1011‘ =
‘1100‘ =
‘1101‘ =
‘1110‘ =
‘1111‘ =
Software select 96_100_SSC output frequency , 0 = 96MHz , 1 = 100MHz.
96_100_SSC Enable , 0 = Disable , 1 = Enable.
96_100_SSC Spread spectrum enable. 0 = Disable , 1 = Enable.
Select output frequency of 96_100_SSC via software or hardware
0 = Hardware, 1 = Software.
RESERVED
SRC[T/C]4 CLKREQ#B control
1 = SRC[T/C]4 stoppable by CLKREQ#B pin
0 = SRC[T/C]4not controlled by CLKREQ#B pin
SRC[T/C]2 CLKREQ#B control
1 = SRC[T/C]2 stoppable by CLKREQ#B pin
0 = SRC[T/C]2 not controlled by CLKREQ#B pin
RESERVED
SRC[T/C]7CLKREQ#A control
1 = SRC[T/C]7 stoppable by CLKREQ#A pin
0 = SRC[T/C]7 not controlled by CLKREQ#A pin
±
±
±
±
±
±
±
±
1.5%
1.25%
0.6%
0.8%
1.0%
0.25%
0.4%
0.5%
Description
Description
Description
CY28442
Page 8 of 22
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