MPC9774AE Freescale Semiconductor, MPC9774AE Datasheet - Page 9

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MPC9774AE

Manufacturer Part Number
MPC9774AE
Description
IC PLL CLK GENERATOR 1:14 52LQFP
Manufacturer
Freescale Semiconductor
Type
Clock Generator, Fanout Distribution, Multiplexer , Zero Delay Bufferr
Datasheet

Specifications of MPC9774AE

Pll
Yes with Bypass
Input
LVCMOS
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
2:14
Differential - Input:output
No/No
Frequency - Max
125MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
125MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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MPC9774AE
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Manufacturer:
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Part Number:
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Power Supply Filtering
circuitry is naturally susceptible to random noise, especially if
this noise is seen on the power supply pins. Random noise
on the VCC_PLL power supply impacts the device
characteristics, for instance I/O jitter. The MPC9774 provides
separate power supplies for the output buffers (VCC) and the
phase-locked loop (VCC_PLL) of the device.The purpose of
this design technique is to isolate the high switching noise
digital outputs from the relatively sensitive internal analog
phase-locked loop. In a digital system environment where it
is more difficult to minimize noise on the power supplies a
second level of isolation may be required. The simple but
effective form of isolation is a power supply filter on the
VCC_PLL pin for the MPC9774. Figure 11 illustrates a typical
power supply filter scheme. The MPC9774 frequency and
phase stability is most susceptible to noise with spectral
content in the 100 kHz to 20 MHz range. Therefore the filter
should be designed to target this range. The key parameter
that needs to be met in the final filter design is the DC voltage
drop across the series filter resistor R
the ICC_PLL current (the current sourced through the
VCC_PLL pin) is typically 5 mA (7.5 mA maximum),
assuming that a minimum of 3.02 V (VCC_PLL, min) must be
maintained on the VCC_PLL pin. The resistor R
Figure 11 must have a resistance of 5-15Ω to meet the
voltage drop criteria.
defined by the required filter characteristics: the RC filter
should provide an attenuation greater than 40 dB for noise
TIMING SOLUTIONS
The MPC9774 is a mixed analog/digital product. Its analog
The minimum values for RF and the filter capacitor C
W
F
. From the data sheet
Figure 12. CCLK MPC9774 AC test reference
F
shown in
F
are
9
whose spectral content is above 100 kHz. In the example RC
filter shown in Figure 11, the filter cut-off frequency is around
3-5 kHz and the noise attenuation at 100 kHz is better than
42 dB.
of an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The
parallel capacitor combination shown ensures that a low
impedance path to ground exists for frequencies well above
the bandwidth of the PLL. Although the MPC9774 has
several design features to minimize the susceptibility to
power supply noise (isolated power and grounds and fully
differential PLL) there still may be applications in which
overall performance is being degraded due to system power
supply noise. The power supply filter schemes discussed in
this section should be adequate to eliminate power supply
noise related problems in most designs.
As the noise frequency crosses the series resonant point
Figure 11. V
CC_PLL
Power Supply Filter
µ
MPC9774
MPC9774
MOTOROLA

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