M48T37Y-70MH1E STMicroelectronics, M48T37Y-70MH1E Datasheet - Page 14

IC TIMEKPR NVRAM 256KBIT5V 44SOH

M48T37Y-70MH1E

Manufacturer Part Number
M48T37Y-70MH1E
Description
IC TIMEKPR NVRAM 256KBIT5V 44SOH
Manufacturer
STMicroelectronics
Series
Timekeeper®r
Type
Clock/Calendar/NVSRAMr
Datasheets

Specifications of M48T37Y-70MH1E

Memory Size
256K (32K x 8)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-SOH
Bus Type
Parallel
User Ram
32KB
Operating Supply Voltage (typ)
5V
Package Type
SOH
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
44
Mounting
Surface Mount
Memory Configuration
32K X 8
Nvram Features
RTC
Interface Type
Parallel
Access Time
70ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
SOIC
No. Of Pins
44
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2854-5
M48T37Y-70MH1

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0
M48T37Y, M48T37V
Setting the Alarm Clock
Registers 7FF5h-7FF2h contain the alarm set-
tings. The alarm can be configured to go off at a
predetermined time on a specific day of the month
or repeat every day, hour, minute, or second. It
can also be programmed to go off while the
M48T37Y/V is in the battery back-up mode of op-
eration to serve as a system wake-up call.
RPT1-RPT4 put the alarm in the repeat mode of
operation. Table
tions. Codes not listed in the table default to the
once per second mode to quickly alert the user of
an incorrect alarm setting.
Note: User must transition address (or toggle chip
enable) to see Flag Bit change.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT1-RPT4, AF is set. If AFE is also set, the
alarm condition activates the IRQ/FT pin. To dis-
Figure 8. Alarm Interrupt Reset Waveform
Table 6. Alarm Repeat Modes
14/29
RPT4
1
1
1
1
0
A0-A14
ACTIVE FLAG BIT
IRQ/FT
6
shows the possible configura-
RPT3
1
1
1
0
0
RPT2
1
1
0
0
0
ADDRESS 7FF0h
15ns Min
able alarm, write '0' to the Alarm Date registers
and RPT1-4. The alarm flag and the IRQ/FT out-
put are cleared by a READ to the Flags Register
as shown in Figure 8. A subsequent READ of the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
The IRQ/FT pin can also be activated in the bat-
tery back-up mode. The IRQ/FT will go low if an
alarm occurs and both the Alarm in Battery Back-
up Mode Enable (ABE) and the AFE are set. The
ABE and AFE bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M48T37Y/V was in the dese-
lect mode during power-up.
lustrates the back-up mode alarm timing.
RPT1
1
0
0
0
0
Once per Second
Alarm Activated
Once per Minute
Once per Month
Once per Hour
Once per Day
AI01677B
Figure 9., page 15
il-

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