ISL12058IUZ Intersil, ISL12058IUZ Datasheet - Page 9

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ISL12058IUZ

Manufacturer Part Number
ISL12058IUZ
Description
IC RTC/CALENDAR I2C-BUS 8-MSOP
Manufacturer
Intersil
Type
Clock/Calendar/Alarmr
Datasheet

Specifications of ISL12058IUZ

Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
ADDR. SECTION
Address 09h to 0Bh and 15h to 1Fh are not used. Reads or
writes to these registers will not affect operation of the
device but should be avoided.
A register can be read by performing a random read at any
address at any time. This returns the contents of that register
location. Additional registers are read by performing a
sequential read. For the RTC registers, the read instruction
latches all clock registers into a buffer, so an update of the
clock does not change the time being read. A sequential
read will not result in the output of data from the memory
array. At the end of a read, the master supplies a stop
condition to end the operation and free the bus. After a read
or write instruction, the address remains at the previous
address +1 so the user can execute a current address read
and continue reading the next register.
.
0Ch
0Dh
0Ah
0Bh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
12h
13h
14h
Control
Alarm1
Alarm2
Status
RTC
A2DW/DT
Not Used
Not Used
Not Used
NAME
A1DW
A1MN
A1MO
A2MN
A1SC
A1HR
A2HR
A1DT
REG
MN
MO
DW
INT
SC
HR
YR
SR
DT
9
ARST
A1M1
A1M2
A1M3
A1M4
A1M5
A1M6
A2M2
A2M3
A2M4
YR23
MIL
0
0
0
0
0
0
0
0
0
7
A2DW/DT
A1MN22
A2MN22
A1SC22
XSTOP
ALM1E
A1MIL
A2MIL
MN22
SC22
YR22
6
0
0
0
0
0
0
0
0
0
0
TABLE 1. REGISTER MEMORY MAP
A1MN21
A2MN21
A1SC21
A1HR21
A2HR21
A1DT21
A2DT21
ALM2E
MN21
SC21
HR21
YR21
DT21
5
0
0
0
0
0
0
0
0
ISL12058
A1MN20
A1MO20
A2MN20
A1SC20
A1HR20
A1DT20
A2HR20
A2DT20
WRTC
MN20
MO20
SC20
HR20
YR20
DT20
FO1
4
0
0
0
0
0
BIT
Real Time Clock Registers
Addresses [00h to 06h]
RTC REGISTERS (SC, MN, HR,DW, DT, MO, YR)
These registers depict BCD representations of the time. As
such, SC (Seconds, address 00h) and MN (Minutes,
address 01h) range from 0 to 59, HR (Hour, address 02h)
can either be a 12-hour or 24-hour mode, DT (Date, address
03h) is 1 to 31, MO (Month, address 04h) is 1 to 12, YR
(Year, address 06h) is 0 to 99, and DW (Day of the Week,
address 06h) is 0 to 6.
The DW register provides a Day of the Week status and uses
three bits DW2 to DW0 to represent the seven days of the
week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1-
2-… The assignment of a numerical value to a specific day
of the week is arbitrary and may be decided by the system
software designer. The default value is defined as “0”.
A1MO13
A1MN13
A1HR13
A2MN13
A2HR13
A1SC13
A1DT13
A2DT13
MN13
MO13
SC13
HR13
YR13
DT13
OSF
FO0
3
0
0
0
0
0
A1MO12
A1DW12
A2DW12
A1MN12
A1HR12
A2MN12
A2HR12
A1SC12
A1DT12
A2DT12
DW12
MN12
MO12
SC12
HR12
DT12
YR12
IRQE
A1F
2
0
0
0
A1MO11
A1DW11
A2DW11
A1MN11
A2MN11
A1SC11
A1HR11
A1DT11
A2HR11
A2DT11
DW11
MN11
MO11
SC11
HR11
YR11
DT11
A2F
1
0
0
0
0
A1MN10
A1MO10
A1DW10
A2MN10
A2DW10
A1SC10
A1HR10
A2HR10
A1DT10
A2DT10
MO10
DW10
MN10
HR10
SC10
DT10
YR10
A1E
PF
0
0
0
0
00 to 59
00 to 59
00 to 59
RANGE DEFAULT
0 to 59
0 to 59
0 to 23
1 to 31
1 to 12
0 to 99
0 to 23
1 to 31
1 to 12
0 to 23
1 to 31
0 to 6
0 to 6
0 to 6
N/A
N/A
N/A
N/A
N/A
REG
June 15, 2009
FN6756.0
00h
00h
00h
01h
01h
00h
00h
09h
18h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h

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