ISL51002CQZ-165 Intersil, ISL51002CQZ-165 Datasheet - Page 21

• Manufacturer Part Number: ISL51002CQZ-165
• Description: IC FRONT END 10BIT VID 128-MQFP
• Manufacturer: Intersil

Specifications of ISL51002CQZ-165

• Number Of Bits: 10
• Number Of Channels: 3
• Power (watts): 1.2W
• Voltage - Supply, Analog: 1.8V, 3.3V
• Voltage - Supply, Digital: 1.8V, 3.3V
• Package / Case: 128-MQFP, 128-PQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Listing
0x56
0x57
0x58
0x59
0x5A
0x60
0x61
ADDRESS
Transition threshold, (0x0A)
Phase Adjust Data 3,
(read only)
Phase Adjust Data 2,
(read only)
Phase Adjust Data 1,
(read only)
Phase Adjust Data 0,
(read only)
AFE CTRL, (0x00)
ADC CTRL, (0x00)
(DEFAULT VALUE)
REGISTER
(Continued)
21
BITS
7:0
7:0
7:0
7:0
7:0
3:2
0
1
2
3
4
5
6
7
0
1
4
PADJ Threshold
Reserved
Reserved
Reserved
Reserved
Reserved
700mV calibration
Coast Clamp Enable
Reserved
Blue Midscale
Green Midscale
Red Midscale
Midscale Override
Dither Enable
Dither Amplitude
Dither Increment
Dither Seed Reset
FUNCTION NAME
ISL51002
Threshold of transitions visible for capturing. These are the 8
MSBs of the 10-bit threshold word used for phase quality
measurements. The actual 10-bit threshold used equals the
value in this register times 4.
Reserved
Reserved
Reserved
Reserved
Set to 0
0: Normal operation
1: All three inputs connected to internal ~700mV reference
0: DC restore clamping and ABLC suspended during Coast
1: DC restore clamping and ABLC continue during Coast
Set to 0
0: Half scale analog shift not added to Blue Channel (UV)
1: Half scale analog shift added to Blue Channel (YRGB)
0: Half scale analog shift not added to Green Channel (UV)
1: Half scale analog shift added to Green Channel (YRGB)
0: Half scale analog shift not added to Red Channel (UV)
1: Half scale analog shift added to Red Channel (YRGB)
0: Midscale determined by RGB/YUV bit in User Control
1: Midscale determined by 0x60[6:4]
0: Dither disabled (default)
1: Dither enabled
0: 16 LSBs (default)
1: 8 LSBs
00: Every Pixel (default)
01: Every HSYNC
10 and 11: Every VSYNC
Set to 1 and then to 0 to reset
voltage
and Macrovision (default)
section – settings in 0x60[6:4] are ignored (default).
DESCRIPTION
September 19, 2007
FN6164.2