AD7980BRMZ Analog Devices Inc, AD7980BRMZ Datasheet - Page 7

• Manufacturer Part Number: AD7980BRMZ
• Description: ADC 16BIT 1MSPS 1.25LSB 10-MSOP
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of AD7980BRMZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 1M
• Number Of Converters: 1
• Power Dissipation (max): 10mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP (0.118", 3.00mm Width)
• Resolution (bits): 16bit
• Sampling Rate: 1MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 2.375V To 2.625V
• Supply Current: 350pA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
Mnemonic
REF
VDD
IN+
IN−
GND
CNV
SDO
SCK
SDI
VIO
Figure 4. 10-Lead MSOP Pin Configuration
GND
VDD
REF
IN+
IN–
Type
AI
P
AI
AI
P
DI
DO
DI
DI
P
1
2
3
4
5
(Not to Scale)
AD7980
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1
Description
Reference Input Voltage. The REF range is from 2.4 V to 5.1 V. It is referred to the GND pin. This pin should
be decoupled closely to the pin with a 10 μF capacitor.
Power Supply.
Analog Input. It is referred to IN−. The voltage range, for example, the difference between IN+ and IN−, is
0 V to V
Analog Input Ground Sense. To be connected to the analog ground plane or to a remote sense ground.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode of the part, chain, or CS mode. In CS mode, it enables the SDO pin when low.
In chain mode, the data should be read when CNV is high.
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.
Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as
follows.
Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data
input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital
data level on SDI is output on SDO with a delay of 16 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can
enable the serial output signals when low; if SDI or CNV is low when the conversion is complete,
the busy indicator feature is enabled.
Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V,
3 V, or 5 V).
10
9
8
7
6
REF
VIO
SDI
SCK
SDO
CNV
.
Rev. B | Page 7 of 28
Figure 5. 10-Lead QFN (LFCSP) Pin Configuration
GND 5
VDD 2
REF 1
IN+ 3
IN– 4
(Not to Scale)
AD7980
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10 VIO
9 SDI
8 SCK
7 SDO
6 CNV
AD7980