LTC2170IUKG-12#PBF Linear Technology, LTC2170IUKG-12#PBF Datasheet - Page 7

• Manufacturer Part Number: LTC2170IUKG-12#PBF
• Description: IC ADC 12BIT SER/PAR 25M 52-QFN
• Manufacturer: Linear Technology

Specifications of LTC2170IUKG-12#PBF

• Number Of Bits: 12
• Sampling Rate (per Second): 25M
• Data Interface: Serial, Parallel
• Number Of Converters: 4
• Power Dissipation (max): 238mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING CHARACTERISTICS
range, otherwise specifi cations are at T
SYMBOL PARAMETER
Digital Data Outputs (R
t
t
t
t
t
t
SPI Port Timing (Note 8)
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above V
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above V
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.
Note 5: V
40MHz (LTC2171), or 25MHz (LTC2170), 2-lane output mode, differential
ENC
unless otherwise noted.
SER
FRAME
DATA
PD
R
F
SCK
S
H
DS
DH
DO
+
/ENC
DD
–
Serial Data Bit Period
FR to DCO Delay
DATA to DCO Delay
Propagation Delay
Output Rise Time
Output Fall Time
DCO Cycle-to-Cycle Jitter
Pipeline Latency
SCK Period
CS to SCK Set-Up Time
SCK to CS Set-Up Time
SDI Set-Up Time
SDI Hold Time
SCK Falling to SDO Valid
= 2V
= OV
P-P
DD
sine wave, input range = 2V
= 1.8V, f
TERM
SAMPLE
= 100Ω Differential, C
= 65MHz (LTC2172),
CONDITIONS
2-Lanes, 16-Bit Serialization
2-Lanes, 14-Bit Serialization
2-Lanes, 12-Bit Serialization
1-Lane, 16-Bit Serialization
1-Lane, 14-Bit Serialization
1-Lane, 12-Bit Serialization
(Note 8)
(Note 8)
(Note 8)
Data, DCO, FR, 20% to 80%
Data, DCO, FR, 20% to 80%
t
Write Mode
Readback Mode, C
Readback Mode
C
SER
SDO
= 1ns
= 20pF , R
A
DD
= 25°C. (Note 5)
P-P
without latchup.
with differential drive,
L
PULLUP
= 2pF to GND on Each Output)
SDO
The
= 2k
= 20pF , R
l
DD
denotes the specifi cations which apply over the full operating temperature
, they
DD
PULLUP
= 2k
Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
best fi t straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 7: Offset error is the offset voltage measured from –0.5 LSB when
the output code fl ickers between 0000 0000 0000 and 1111 1111 1111 in
2’s complement output mode.
Note 8: Guaranteed by design, not subject to test.
Note 9: V
(LTC2171), or 25MHz (LTC2170), 2-lane output mode, ENC
ended 1.8V square wave, ENC
drive, unless otherwise noted. The supply current and power dissipation
specifi cations are totals for the entire chip, not per channel.
Note 10: Recommended operating conditions.
Note 11: The maximum sampling frequency depends on the speed grade
of the part and also which serialization mode is used. The maximum serial
data rate is 1000Mbps, so t
Note 12: Near-channel crosstalk refers to Ch. 1 to Ch.2, and Ch.3 to Ch.4.
Far-channel crosstalk refers to Ch.1 to Ch.3, Ch.1 to Ch.4, Ch.2 to Ch.3, and
Ch.2 to Ch.4.
l
l
l
l
l
l
l
l
l
l
DD
LTC2171-12/LTC2170-12
= OV
0.7n + 2 • t
0.35 • t
0.35 • t
DD
MIN
250
40
= 1.8V, f
5
5
5
5
SER
SER
SER
SER
SAMPLE
–
= 0V, input range = 2V
must be greater than or equal to 1ns.
1.1n + 2 • t
1 / (16 • f
1 / (14 • f
1 / (12 • f
1 / (8 • f
1 / (7 • f
1 / (6 • f
0.5 • t
0.5 • t
= 65MHz (LTC2172), 40MHz
0.17
0.17
TYP
60
6
SER
SER
LTC2172-12/
S
S
S
S
S
S
SER
)
)
)
)
)
)
1.5n + 2 • t
0.65 • t
0.65 • t
P-P
MAX
125
with differential
SER
SER
+
SER
= single-
21721012f
UNITS
Cycles
ps
7
P-P
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s