MAX1295ACEI+ Maxim Integrated Products, MAX1295ACEI+ Datasheet - Page 10

• Manufacturer Part Number: MAX1295ACEI+
• Description: IC ADC 12BIT 265KSPS 28-QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1295ACEI+

• Number Of Bits: 12
• Sampling Rate (per Second): 265k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 762mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

265ksps, +3V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
der of the conversion cycle to restore node ZERO to 0V
within the limits of 12-bit resolution. This action is equiv-
alent to transferring a 12pF (V
C
turn forms a digital representation of the analog input
signal.
Internal protection diodes, which clamp the analog
input to V
swing within (GND - 300mV) to (V
damage. However, for accurate conversions near full
scale, both inputs must not exceed (V
less than (GND - 50mV).
If an analog input voltage exceeds the supplies by
more than 50mV, limit the forward-bias input current to
4mA.
The MAX1295/MAX1297 T/H stage enters its tracking
mode on WR’s rising edge. In external acquisition
mode, the part enters its hold mode on the next rising
edge of WR. In internal acquisition mode, the part
enters its hold mode on the fourth falling edge of clock
after writing the control byte. Note that, in internal clock
mode, this is approximately 1µs after writing the control
byte.
Table 2. Channel Selection for Single-Ended Operation
10
Table 3. Channel Selection for Pseudo-Differential Operation (SGL/DIF = 0)
*Channels CH2–CH5 apply to MAX1295 only.
*Channels CH2–CH5 apply to MAX1295 only.
HOLD
A2
______________________________________________________________________________________
A2
0
0
0
0
1
1
0
0
0
0
1
1
to the binary-weighted capacitive DAC, which in
DD
and GND, allow each input channel to
A1
0
0
1
1
0
0
A1
0
0
1
1
0
0
Analog Input Protection
A0
0
1
0
1
0
1
A0
IN+
0
1
0
1
0
1
DD
- V
DD
+ 300mV) without
IN-
CH0
+
+ 50mV) or be
) charge from
Track/Hold
CH0
+
-
CH1
+
CH1
+
-
In single-ended operation, IN- is connected to COM
and the converter samples the positive “+” input. In
pseudo-differential operation, IN- connects to the nega-
tive “-” input, and the difference of
pled. At the beginning of the next conversion, the
positive input connects back to IN+ and CHOLD
charges to the input signal.
The time required for the T/H stage to acquire an input
signal depends on how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time,
t
the signal, and is also the minimum time required for
the signal to be acquired. Calculate this with the follow-
ing equation:
where R
R
the input capacitance of the ADC. Source impedances
below 3kΩ have no significant impact on the MAX1295/
MAX1297’s AC performance.
Higher source impedances can be used if a 0.01µF
capacitor is connected to the individual analog inputs.
ACQ
CH2*
IN
+
(800Ω) is the input resistance, and C
, is the maximum time the device takes to acquire
CH2*
S
+
-
is the source impedance of the input signal,
(SGL/DIF = 1)
CH3*
+
t
ACQ
CH3*
= 9 (R
+
-
CH4*
+
S
+ R
IN
CH4*
|
) C
(IN+) - (IN-)
+
-
CH5*
+
IN
IN
(12pF) is
CH5*
|
COM
is sam-
+
-
-
-
-
-
-
-