LTC2411-1IMS#TR Linear Technology, LTC2411-1IMS#TR Datasheet - Page 16

• Manufacturer Part Number: LTC2411-1IMS#TR
• Description: IC A/DCONV DIFF INPUT&REF 10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2411-1IMS#TR

• Number Of Bits: 24
• Sampling Rate (per Second): 6.8
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC2411-1IMSTR; LTC24111IMSTR

APPLICATIO S I FOR ATIO
Finally, CS can be used to control the free-running modes
of operation, see Serial Interface Timing Modes section.
Grounding CS will force the ADC to continuously convert
at the maximum output rate selected by F
SERIAL INTERFACE TIMING MODES
The LTC2411/LTC2411-1’s 3-wire interface is SPI and
MICROWIRE compatible. This interface offers several
flexible modes of operation. These include internal/exter-
nal serial clock, 2- or 3-wire I/O, single cycle conversion.
The following sections describe each of these serial inter-
face timing modes in detail. In all these cases, the
converter can use the internal oscillator (F
= HIGH) or an external oscillator connected to the F
Refer to Table 4 for a summary.
LTC2411/LTC2411-1
Table 4. LTC2411/LTC2411-1 Interface Timing Modes
Configuration
External SCK, Single Cycle Conversion
External SCK, 2-Wire I/O
Internal SCK, Single Cycle Conversion
Internal SCK, 2-Wire I/O, Continuous Conversion
(EXTERNAL)
16
SDO
SCK
CS
Hi-Z
CONVERSION
TEST EOC
U
TEST EOC
SLEEP
U
Hi-Z
W
Figure 5. External Serial Clock, Single Cycle Operation
BIT 31
EOC
BIT 30
ANALOG INPUT RANGE
O
O
–0.5V
.
= LOW or F
REF
U
External
External
Internal
Internal
Source
0.1V TO V
REFERENCE
SCK
TO 0.5V
BIT 29
VOLTAGE
SIG
1 F
O
2.7V TO 5.5V
REF
pin.
CC
O
BIT 28
MSB
1
2
3
4
5
6
V
REF
REF
IN
IN
GND
CC
LTC2411-1
+
–
LTC2411/
+
–
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 5.
The serial clock mode is selected on the falling edge of CS.
To select the external serial clock mode, the serial clock pin
(SCK) must be LOW during each CS falling edge.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is pulled LOW, EOC is output to the SDO pin.
EOC = 1 while a conversion is in progress and EOC = 0 if
the device is in the sleep state. Independent of CS, the
BIT 27
Conversion
CS and SCK
SDO
Continuous
SCK
DATA OUTPUT
CS
F
Control
O
Cycle
CS
SCK
10
9
8
7
BIT 26
3-WIRE
SPI INTERFACE
V
CC
= 50Hz REJECTION (LTC2411)
= EXTERNAL OSCILLATOR
= 60Hz REJECTION (LTC2411)
= SIMULTANEOUS 50Hz/60Hz REJECTION (LTC2411-1)
CS and SCK
BIT 5
LSB
Control
Internal
Output
CS
Data
SCK
SUB LSB
BIT 0
Connection
Waveforms
Figures 5, 6
Figures 8, 9
Figure 10
Figure 7
and
CONVERSION
Hi-Z
TEST EOC
2411 F05