AD7738BRU Analog Devices Inc, AD7738BRU Datasheet - Page 14

• Manufacturer Part Number: AD7738BRU
• Description: IC ADC 24BIT 8-CH 28-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7738BRU

• Rohs Status: RoHS non-compliant
• Number Of Bits: 24
• Sampling Rate (per Second): 15.4k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 100mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)
• For Use With: EVAL-AD7738EBZ - BOARD EVAL FOR AD7738

AD7738
I/O Port Register
8 Bits, Read/Write Register, Address 01h, Default Value 30h + Digital Input Value
The bits in this register are used to configure and access the digital I/O pin on the AD7738.
Bit
Mnemonic
Default
Bit
7
6
5
4
3
2, 1
0
Revision Register
8 Bits, Read-Only Register, Address 02h, Default Value 01h + Chip Revision
Bit
Mnemonic
Default
Bit
7–4
3–0
Test Register
24 Bits, Read/Write Register, Address 03h
This register is used for testing the part in the manufacturing process. The user must not change the default configuration of this register.
ADC Status Register
8 Bits, Read-Only Register, Address 04h, Default Value 00h
In conversion modes, the register bits reflect the individual channel status. When a conversion is complete, the corresponding Channel
Data register is updated and the corresponding RDY bit is set to 1. When the Channel Data register is read, the corresponding bit is
reset to 0. The bit is also reset to 0 when no read operation has taken place and the result of the next conversion is being updated to
the Channel Data register. Writing to the Mode register resets all the bits to 0.
In calibration modes, all the register bits are reset to 0 while a calibration is in progress and all the bits are set to 1 when the
calibration is complete.
The RDY pin output is related to the content of ADC Status register as defined by the RDY Function bit in the I/O Port register.
Bit
Mnemonic
Default
The RDY0 bit corresponds to Channel 0, RDY1 bit to Channel 1, and so on.
Mnemonic
P0
P1
P0 DIR
P1 DIR
RDY FN
0
SYNC
Mnemonic
Chip Revision Code
Chip Generic Code
Bit 7
P0
P0 Pin
Description
When the AINCOM/P0 pin is configured as a digital output, the P0 bit determines the pin’s output level.
When the P1 pin is configured as an output, the P1 bit determines the pin’s output level. When the P1
pin is configured as an input, the P1 bit reflects the current input level on the pin.
When set to 1, the AINCOM/P0 pin is configured as an analog input. When set to 0, the AINCOM/P0
pin is configured as a digital output.
This bit determines whether P1 pin is configured as an input or an output. When set to 1, the P1 pin will
be a digital input; when reset to 0, the pin will be a digital output.
This bit is used to control the function of the RDY pin on the AD7738. When this bit is reset to 0 the RDY
pin goes low when any channel has unread data. When this bit is set to 1, the RDY pin will only go low if all
enabled channels have unread data.
These bits must be zero for proper operation.
This bit enables the SYNC pin function. By default, this bit is 0 and SYNC/P1 can be used as a
digital I/O pin. When the SYNC EN bit is set to 1, the SYNC pin can be used to synchronize the
AD7738 modulator and digital filter with other devices in the system.
Bit 7
x
Bit 7
RDY7
0
Bit 6
P1
P1 Pin
Bit 6
x
Description
4-Bit Factory Chip Revision Code
On the AD7738, these bits will read back as 01h.
Bit 6
RDY6
0
Chip Revision Code
Bit 5
P0 DIR
1
Bit 5
x
Bit 5
RDY5
0
–14–
Bit 4
P1 DIR
1
Bit 4
x
Bit 4
RDY4
0
10h
40h
Bit 3
RDY FN
0
Bit 3
0
Bit 3
RDY3
0
Bit 2
0
0
Bit 2
0
Bit 2
RDY2
0
Chip Generic Code
Bit 1
0
0
Bit 1
0
Bit 1
RDY1
0
Bit 0
SYNC
0
Bit 0
1
Bit 0
RDY0
0
REV. 0