AD7879ACPZ-RL Analog Devices Inc, AD7879ACPZ-RL Datasheet - Page 30

IC ADC 12BIT CTLR TOUCH 16LFCSP

AD7879ACPZ-RL

Manufacturer Part Number
AD7879ACPZ-RL
Description
IC ADC 12BIT CTLR TOUCH 16LFCSP
Manufacturer
Analog Devices Inc
Type
Touch Screen Controller: 4-Wire Resistiver
Datasheet

Specifications of AD7879ACPZ-RL

Resolution (bits)
12 b
Data Interface
I²C
Package / Case
16-LFCSP
Mounting Type
Surface Mount
Voltage - Supply
1.6 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Voltage Supply Source
Single Supply
Sampling Rate (per Second)
105k
Sampling Rate
105kSPS
Supply Voltage Range - Analog
1.6V To 3.6V
Supply Current
480µA
Digital Ic Case Style
CSP
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7879ACPZ-RL
Manufacturer:
Maxim
Quantity:
50
AD7879
SERIAL INTERFACE
The AD7879 is available with an serial peripheral interface
(SPI). The AD7879-1 is available with an I
interface. Both parts are the same, with the exception of the
serial interface. It is recommended not to write to addresses
outside the register map.
SPI INTERFACE
The AD7879 has a 4-wire SPI. The SPI has a data input pin
(DIN) for inputting data to the device, a data output pin
(DOUT) for reading data back from the device, and a data
clock pin (SCL) for clocking data into and out of the device.
A chip select pin ( CS ) enables or disables the serial interface.
CS is required for correct operation of the SPI interface. Data
is clocked out of the AD7879 on the negative edge of SCL and
data is clocked into the device on the positive edge of SCL.
SPI Command Word
All data transactions on the SPI bus begin with the master
taking CS from high to low and sending out the command
word. This indicates to the AD7879 whether the transaction
is a read or a write, and gives the address of the register from
which to begin the data transfer. The bit map in
the SPI command word.
Table 22.
MSB
15
1
SCL
DIN
CS
14
NOTES
1. DATA BITS ARE LATCHED ON SCL RISING EDGES. SCL CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 32 BITS MUST BE WRITTEN: 16 BITS FOR CONTROL WORD AND 16 BITS FOR DATA.
3. 16-BIT COMMAND WORD SETTINGS FOR SERIAL WRITE OPERATION:
1
CW[15:11] = 11100 (ENABLE WORD)
CW[10] = 0 (R/W)
CW[9:0] = [AD9, AD8, AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0] (10-BIT MSB JUSTIFIED REGISTER ADDRESS)
CW
15
t
2
13 12
1
1
t
1
CW
ENABLE WORD
14
2
0
t
3
CW
13
3
11
0
CW
12
4
10
R/W
CW
11
5
t
R/W
CW
4
10
6
16-BIT COMMAND WORD
CW
9:0
Register address
9
2
C®-compatible
7
CW
8
Table 22
8
Figure 38. Single Register Write, SPI Timing
CW
7
t
5
9
REGISTER ADDRESS
CW
shows
6
10
LSB
Rev. 0 | Page 30 of 36
CW
5
11
CW
4
12
CW
3
Bits[15:11] of the command word must be set to 11100 to
successfully begin a bus transaction.
Bit 10 is the read/write bit; 1 indicates a read, and 0 indicates
a write.
Bits[9:0] contain the target register address. When reading or
writing to more than one register, this address indicates the
address of the first register to be written to or read from.
Writing Data
Data is written to the AD7879 in 16-bit words. The first word
written to the device is the command word, with the read/write
bit set to 0. The master then supplies the 16-bit input data-word
on the DIN line. The AD7879 clocks the data into the register
addressed in the command word. If there is more than one word
of data to be clocked in, the AD7879 automatically increments
the address pointer and clocks the next data-word into the
following register.
The AD7879 continues to clock in data on the SDA line until
either the master finishes the write transition by pulling CS
high, or until the address pointer reaches its maximum value.
The AD7879 address pointer does not wrap around. When it
reaches its maximum value, any data provided by the master
on the DIN line is ignored by the AD7879.
13
CW
2
14
CW
1
15
CW
0
16
D15
17
D14
18
D13
19
16-BIT DATA
D2
30
D1
t
8
31
D0
32

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