AD7879ACPZ-RL Analog Devices Inc, AD7879ACPZ-RL Datasheet - Page 34

• Manufacturer Part Number: AD7879ACPZ-RL
• Description: IC ADC 12BIT CTLR TOUCH 16LFCSP
• Manufacturer: Analog Devices Inc
• Type: Touch Screen Controller: 4-Wire Resistiver

Specifications of AD7879ACPZ-RL

• Resolution (bits): 12 b
• Data Interface: I²C
• Package / Case: 16-LFCSP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.6 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Voltage Supply Source: Single Supply
• Sampling Rate (per Second): 105k
• Sampling Rate: 105kSPS
• Supply Voltage Range - Analog: 1.6V To 3.6V
• Supply Current: 480µA
• Digital Ic Case Style: CSP
• No. Of Pins: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7879
TRANSACTIONS
NOTES
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCL REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCL REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB Xs ARE DON'T CARE BITS.
5. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
6. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION.
REPEATED
SEPARATE
READ AND
WRITE
READ (USING REPEATED START)
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
S
S
S
USING
START
6-BIT DEVICE
6-BIT DEVICE
6-BIT DEVICE
WRITE
ADDRESS
ADDRESS
ADDRESS
OUTPUT FROM MASTER
OUTPUT FROM AD7879
SDA
SCL
START
W
W
W
SR
19
REGISTER ADDR
REGISTER ADDR
REGISTER ADDR
P
DEV
t
A6
1
[7:0]
[7:0]
[7:0]
20
DEV
A6
19
S
AD7879-1 DEVICE ADDRESS
DEV
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
R = READ BIT
1
A5
21
DEV
AD7879-1 DEVICE ADDRESS
DEV
A6
A5
20
2
AD7879-1 DEVICE ADDRESS
DEV
DEV
A5
A4
Figure 43. Example of I
HIGH BYTE [15:8]
P
21
3
WRITE DATA
Figure 44. Example of Sequential I
6-BIT DEVICE
LOW BYTE
DEV
A3
t
2
DEV
4
A1
S
25
DEV
6-BIT DEVICE
A2
ADDRESS
DEV
5
A0
t
4
26
R
DEV
DEV
A1
A1
W = WRITE BIT
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
25
6
R/W
LOW BYTE [7:0]
t
3
WRITE DATA
READ DATA
27
DEV
DEV
ADDRESS
A0
A0
2
t
C Timing for Single Register Read Back Operation
4
26
R
ACK
7
Rev. 0 | Page 34 of 36
28
R/W
R/W
HIGH BYTE [15:8]
27
8
D7
READ DATA
29
ACK
ACK
REGISTER DATA[D7:D0]
28
. . .
9
2
HIGH BYTE [15:8]
D6
C Write and Read Back Operation
30
t
READ DATA
5
D7
A7
29
10
HIGH BYTE [15:8]
REGISTER ADDRESS[A7:A0]
WRITE DATA
REGISTER DATA[D7:D0]
D6
A6
30
t
11
5
LOW BYTE [7:0]
READ DATA
. . .
D1
35
HIGH BYTE [15:8]
D0
LOW BYTE [7:0]
READ DATA
36
WRITE DATA
D1
A1
35
16
ACK
. . .
37
D0
A0
36
HIGH BYTE [15:8]
17
READ DATA
ACK
t
ACK
6
P
18
37
LOW BYTE [7:0]
P
READ DATA
t
8
P
t
7
LOW BYTE [7:0]
READ DATA
AD7879 DEVICE ADDRESS
P
DEV
A6
1
DEV
A5
2
P
DEV
A4
3