X9420YS16I Intersil, X9420YS16I Datasheet - Page 8

• Manufacturer Part Number: X9420YS16I
• Description: IC XDCP SGL 64-TAP 2.5K 16-SOIC
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9420YS16I

• Taps: 64
• Resistance (ohms): 2.5K
• Number Of Circuits: 1
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Resistance In Ohms: 2.5K
• Number Of Elements: 1
• # Of Taps: 64
• Resistance (max): 2.5KOhm
• Power Supply Requirement: Dual
• Interface Type: Serial (SPI)
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): ±5V
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): ±4.5V
• Dual Supply Voltage (max): ±5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 3. Instruction Set
Read Wiper Counter
Register
Write Wiper Counter
Register
Read Data Register
Write Data Register
XFR Data Register to
Wiper Counter
Register
XFR Wiper Counter
Register to Data
Register
Increment/Decrement
Wiper Counter
Register
Read Status (WIP bit)
Instruction
I
1
1
1
1
1
1
0
0
3
8
I
0
0
0
1
1
1
0
1
2
I
0
1
1
0
0
1
1
0
1
Instruction Set
I
1
0
1
0
1
0
0
1
0
R
R
R
R
R
0
0
0
0
1
1
1
1
1
R
R
R
R
R
0
0
0
0
0
0
0
0
0
X9420
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Read the contents of the Wiper Counter Register
Write new value to the Wiper Counter Register
Read the contents of the Data Register pointed to by
R
Write new value to the Data Register pointed to by
R
Transfer the contents of the Data Register pointed to
by R
Transfer the contents of the Wiper Counter
Register to the Data Register pointed to by R
Enable Increment/decrement of the Wiper Counter
Register
Read the status of the internal write cycle, by check-
ing the WIP bit.
1
1
- R
- R
1
0
0
- R
0
to the Wiper Counter Register
Operation
April 26, 2006
1
FN8195.1
- R
0