AD9767ASTZ Analog Devices Inc, AD9767ASTZ Datasheet - Page 22
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AD9767ASTZ
Manufacturer Part Number
AD9767ASTZ
Description
IC DAC 14BIT DUAL 125MSPS 48LQFP
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Specifications of AD9767ASTZ
Data Interface
Parallel
Settling Time
35ns
Number Of Bits
14
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
450mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
14bit
Sampling Rate
125MSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
3V To 5.5V
Supply Voltage Range - Digital
2.7V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9767-EBZ - BOARD EVAL FOR AD9767
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
ADI
Quantity:
3 000
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Part Number:
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Manufacturer:
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Part Number:
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Manufacturer:
Analog Devices Inc
Quantity:
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Company:
Part Number:
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Analog Devices Inc
Quantity:
10 000
AD9763/AD9765/AD9767
The full-scale output current of each DAC is regulated by
separate reference control amplifiers and can be set from
2 mA to 20 mA via an external network connected to the full
scale adjust (FSADJ) pin. The external network, in combination
with both the reference control amplifier and voltage reference
(V
segmented current sources with the proper scaling factor. The
full-scale current (I
REFERENCE OPERATION
The AD9763/AD9765/AD9767 contain an internal 1.20 V band
gap reference. This can easily be overridden by a low noise external
reference with no effect on performance. REFIO serves as either
an input or output, depending on whether the internal or an
external reference is used. To use the internal reference, simply
decouple the REFIO pin to ACOM with a 0.1 μF capacitor. The
internal reference voltage is present at REFIO. If the voltage at
REFIO is used elsewhere in the circuit, an external buffer amplifier
with an input bias current of less than 100 nA should be used. An
example of the use of the internal reference is shown in Figure 59.
ADDITIONAL
An external reference can be applied to REFIO as shown in
Figure 60. The external reference can provide either a fixed
reference voltage to enhance accuracy and drift performance
or a varying reference voltage for gain control. The 0.1 μF
compensation capacitor is not required because the internal
reference is overridden and the relatively high input impedance
of REFIO minimizes any loading of the external reference.
EXTERNAL
REFIO
REFERENCE
LOAD
EXTERNAL
Figure 60. External Reference Configuration Gain Control Mode
REFERENCE
EXTERNAL
OPTIONAL
) sets the reference current I
BUFFER
AVDD
R
I
REF
SET
Figure 59. Internal Reference Configuration
0.1µF
OUTFS
I
REF
R
256Ω
SET
22nF
) is 32 × I
REFIO
FSADJ1/
FSADJ2
GAINCTRL
256Ω
22nF
1.2V
REF
REF
GAINCTRL
REFIO
FSADJ1/
FSADJ2
REF
1.2V
REF
.
, which is replicated to the
REFERENCE
AD9763/
AD9765/
AD9767
SECTION
REFERENCE
AD9763/
AD9765/
AD9767
SECTION
CURRENT
SOURCE
ARRAY
AVDD
CURRENT
SOURCE
ARRAY
ACOM
AVDD
ACOM
Rev. F | Page 22 of 44
GAIN CONTROL MODE
The AD9763/AD9765/AD9767 allow the gain of each channel
to be set independently by connecting one R
to FSADJ1 and another R
flexibility and reduce system cost, a single R
used to set the gain of both channels simultaneously. If this R
resistor is 2 kΩ or less, the 22 nF capacitor and 256 Ω resistor
are not required on either FSADJ pin.
When GAINCTRL is low (that is, connected to analog ground), the
independent channel gain control mode using two resistors is
enabled. In this mode, individual R
connected to FSADJ1 and FSADJ2. When GAINCTRL is high
(that is, connected to AVDD), the master/slave channel gain
control mode using one network is enabled. In this mode, a single
network is connected to FSADJ1, and the FSADJ2 pin must be
left unconnected.
Note that only parts with a date code of 9930 or later have the
master/slave gain control function. For parts with a date code
before 9930, Pin 42 must be connected to AGND, and the part
operates in the two-resistor, independent gain control mode.
SETTING THE FULL-SCALE CURRENT
Both of the DACs in the AD9763/AD9765/AD9767 contain a
control amplifier that is used to regulate the full-scale output
current (I
converter, as shown in Figure 59, so that its current output (I
determined by the ratio of the V
The DAC full-scale current, I
larger than the reference current, I
The control amplifier allows a wide (10:1) adjustment span of
I
625 μA. The wide adjustment range of I
benefits. The first relates directly to the power dissipation of
the AD9763/AD9765/AD9767, which is proportional to I
(refer to the Power Dissipation section). The second relates to the
20 dB adjustment, which is useful for system gain control purposes.
It should be noted that when the R
the 22 nF capacitor and 256 Ω resistor shown in Figure 59 and
Figure 60 are not required and the reference current can be set
by the R
22 nF capacitor and 256 Ω resistor networks are required to
ensure the stability of the reference control amplifier(s).
Regardless of the value of R
located more than ~10 cm away from the pin, use of the 22 nF
capacitor and 256 Ω resistor is recommended.
OUTFS
I
I
from 2 mA to 20 mA by setting I
OUTFS
REF
SET
OUTFS
=
resistors alone. For R
=
V
R
REFIO
32
). The control amplifier is configured as a V-I
SET
×
I
REF
SET
SET
resistor network to FSADJ2. To add
OUTFS
, however, if the R
REFIO
SET
, is an output current 32 times
REF
SET
and an external resistor, R
SET
values greater than 2 kΩ, the
.
resistors are 2 kΩ or less,
resistor networks must be
REF
OUTFS
between 62.5 μA and
SET
SET
provides several
resistor can be
resistor network
SET
resistor is
OUTFS
REF
) is
SET
SET
.