AD9772AASTZ Analog Devices Inc, AD9772AASTZ Datasheet - Page 22

IC DAC 14BIT 160MSPS 48-LQFP

AD9772AASTZ

Manufacturer Part Number
AD9772AASTZ
Description
IC DAC 14BIT 160MSPS 48-LQFP
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheet

Specifications of AD9772AASTZ

Data Interface
Parallel
Settling Time
11ns
Number Of Bits
14
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
272mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
14bit
Sampling Rate
160MSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
3.1V To 3.5V
Supply Current
37mA
Digital Ic Case Style
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9772A-EB - BOARD EVAL FOR AD9772A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD9772A
DAC OPERATION
The 14-bit DAC, along with the 1.2 V reference and reference
control amplifier, is shown in Figure 37. The DAC consists of a
large PMOS current source array capable of providing up to
20 mA of full-scale current, I
equal currents that make up the five most significant bits
(MSBs). The next four bits, or middle bits, consist of 15 equal
current sources whose values are 1/16
source. The remaining LSBs are binary-weighted fractions of
the middle bits’ current sources. All of these current sources are
switched to one of the two output nodes (that is, I
the PMOS differential current switches. Implementing the middle
and lower bits with current sources instead of an R-2R ladder
enhances its dynamic performance for multitone or low amplitude
signals and helps maintain the high output impedance of the DAC.
The full-scale output current is regulated by the reference
control amplifier and can be set from 2 mA to 20 mA via an
external resistor, R
combination with both the reference control amplifier and
voltage reference, REFIO, sets the reference current, I
is mirrored to the segmented current sources with the proper
scaling factor. The full-scale current, I
the value of I
DAC TRANSFER FUNCTION
The AD9772A provides complementary current outputs, I
and I
when all bits are high (that is, DAC CODE = 16,383), whereas
I
current output appearing at I
the input code and I
where DAC CODE = 0 to 16,383 (that is, decimal representation).
As previously mentioned, I
current (I
(V
OUTB
R
2kΩ
Figure 37. Block Diagram of Internal DAC, 1.2 V Reference, and Reference
0.1µF
SET
REFIO
, the complementary output, provides no current. The
B
I
I
I
OUTB
OUTA
OUTB
OUTFS
) and an external resistor (R
REFIO
FSADJ
I
REF
. I
B
1.2V REF
AD9772A
REF
= (16,383 − DAC CODE)/16,384 × I
= (DAC CODE/16,384) × I
= 32 × I
OUTA
), which is nominally set by a reference voltage
REF
REFLO
SEGMENTED
.
provides a near full-scale current output, I
SWITCHES
REF
SET
INTERPOLATED
OUTFS
DIGITAL DATA
, as shown in Figure 37. R
250pF
and can be expressed as
Control Circuits
2.7V TO 3.6V
AVDD
OUTFS
CURRENT
SWITCHES
SOURCE
ARRAY
OUTFS
OUTA
LSB
is a function of the reference
. The array is divided into 31
and I
SET
ACOM
I
I
OUTA
OUTB
OUTFS
). It can be expressed as
th
OUTFS
OUTB
of an MSB current
I
I
OUTA
OUTB
, is exactly 32 times
B
is a function of both
OUTFS
V
SET
OUTA
R
DIFF
LOAD
, in
= V
or I
OUTA
R
REF
LOAD
OUTB
, which
– V
OUTFS
) via
OUTA
OUTB
Rev. C | Page 22 of 40
(1)
(2)
(3)
,
where:
The two current outputs typically drive a resistive load directly
or via a transformer. If dc coupling is required, I
should be directly connected to matching resistive loads, R
that are tied to analog common, ACOM. Note that R
represent the equivalent load resistance seen by I
would be the case in a doubly terminated 50 Ω or 75 Ω cable.
The single-ended voltage output appearing at the I
nodes is simply
Note that the full-scale value of V
exceed the specified output compliance range of 1.25 V to
prevent signal compression. To maintain optimum distortion
and linearity performance, the maximum voltages at V
V
The differential voltage, V
Substituting the values of I
expressed as
The last two equations highlight some of the advantages of
operating the AD9772A differentially. First, the differential
operation helps cancel common-mode error sources, such as
noise, distortion, and dc offsets, associated with I
Second, the differential code-dependent current and
subsequent voltage, V
voltage output (that is, V
signal power to the load.
Note that the gain drift temperature performance for a single-
ended (V
AD9772A can be enhanced by selecting temperature tracking
resistors for R
as shown in Equation 8.
REFERENCE OPERATION
The AD9772A contains an internal 1.20 V band gap reference
that can easily be disabled and overridden by an external
reference. REFIO serves as either an output or input, depend-
ing on whether the internal or external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 38, the internal
reference is activated, and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 μF or greater from REFIO
to REFLO. If any additional loading is required, REFIO should
be buffered with an external amplifier having an input bias
current less than 100 nA.
OUTB
I
V
V
V
V
(32 × R
REF
B
should not exceed ±500 mV p-p.
OUTA
OUTB
DIFF
DIFF
= V
OUTA
= (I
= [(2 DAC CODE − 16,383)/16,384] ×
= I
= I
LOAD
REFIO
OUTB
OUTA
OUTA
and V
LOAD
/R
/R
× R
× R
− I
SET
and R
SET
OUTB
) × V
OUTB
LOAD
LOAD
DIFF
) or differential output (V
B
SET
DIFF
OUTA
) × R
, is twice the value of the single- ended
REFIO
OUTA
due to their ratiometric relationship,
, appearing across I
or V
LOAD
, I
OUTB
OUTA
OUTB
, and I
B
), thus providing twice the
B
and V
REF
OUTB
, V
OUTA
OUTA
DIFF
should not
OUTA
OUTA
DIFF
and I
OUTA
can be
and I
LOAD
) of the
or I
and I
OUTA
and I
OUTB
OUTB
can
OUTB
LOAD
B
OUTB
and
is
OUTB
, as
(4)
(5)
(6)
(7)
(8)
,
.

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