AD9709ASTZ Analog Devices Inc, AD9709ASTZ Datasheet - Page 21

• Manufacturer Part Number: AD9709ASTZ
• Description: IC DAC 8BIT DUAL 125MSPS 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9709ASTZ

• Data Interface: Parallel
• Settling Time: 35ns
• Number Of Bits: 8
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 8bit
• Sampling Rate: 125MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 3V To 5.5V
• Supply Voltage Range - Digital: 2.7V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9709-EBZ - BOARD EVAL FOR AD9709
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for simplicity’s
sake, all of this noise is concentrated at 250 kHz (that is, ignore
harmonics). To calculate how much of this undesired noise will
appear as current noise superimposed on the DAC full-scale
current, I
Figure 41 at 250 kHz. To calculate the PSRR for a given R
such that the units of PSRR are converted from A/V to V/V,
adjust the curve in Figure 41 by the scaling factor 20 × log(R
For instance, if R
(that is, the PSRR of the DAC at 250 kHz, which is 85 dB in
Figure 41, becomes 51 dB V
Proper grounding and decoupling should be a primary
objective in any high speed, high resolution system. The
AD9709 features separate analog and digital supply and ground
pins to optimize the management of analog and digital ground
currents in a system. In general, decouple the analog supply
OUTFS
, one must determine the PSRR in decibels using
LOAD
is 50 Ω, the PSRR is reduced by 34 dB
OUT
/V
IN
).
LOAD
LOAD
Rev. B | Page 21 of 32
).
,
(AVDD) to the analog common (ACOM) as close to the chip as
physically possible. Similarly, decouple DVDD1/DVDD2, the
digital supply (DVDD1/DVDD2) to the digital common
(DCOM1/DCOM2) as close to the chip as possible.
For applications that require a single 5 V or 3.3 V supply for
both the analog and digital supplies, a clean analog supply can
be generated using the circuit shown in Figure 42. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low-ESR
type electrolytic and tantalum capacitors.
TTL/CMOS
CIRCUITS
LOGIC
Figure 42. Differential LC Filter for Single 5 V and 3.3 V Applications
POWER SUPPLY
5V
FERRITE
BEADS
ELECTROLYTIC
100µF
TANTALUM
10µF
TO
22µF
CERAMIC
0.1µF
AD9709
AVDD
ACOM