K4S561632J-UC60000 Samsung Semiconductor, K4S561632J-UC60000 Datasheet - Page 12

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K4S561632J-UC60000

Manufacturer Part Number
K4S561632J-UC60000
Description
Manufacturer
Samsung Semiconductor
Type
SDRAMr
Datasheet

Specifications of K4S561632J-UC60000

Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
120mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
K4S560432J
K4S560832J
K4S561632J
15.0 AC Characteristics
16.0 DQ Buffer Output Drive Characteristics
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in Hi-Z
Notes :
Notes :
Output rise time
Output fall time
Output rise time
Output fall time
Parameter
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
4. tSS applies for address setup time, clock enable setup time. commend setup time and data setup time
1. Rise time specification based on 0pF + 50 Ω to V
2. Fall time specification based on 0pF + 50 Ω to V
3. Measured into 50pF only, use these values to characterize to.
4. All measurements done with respect to V
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
tSH applies for address holde time, clock enable hold time. commend hold time and data hold time
Parameter
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
Symbol
trh
tfh
trh
tfh
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
Measure in linear
region : 1.2V ~ 1.8V
Symbol
tSAC
tSHZ
tSLZ
tCC
tOH
tCH
tSS
tSH
tCL
Condition
SS
.
Min
1.5
50 (x16 only)
5
2
2
2
1
1
DD
-
-
-
-
-
-
SS
, use these values to design to.
, use these values to design to.
12 of 15
1000
Max
4.5
4.5
-
-
-
-
-
-
-
-
-
1.37
1.30
Min
2.8
2.0
Min
60(x16 only)
2.5
2.5
2.5
1.5
6
1
1
-
-
Typ
3.9
2.9
(AC operating conditions unless otherwise noted)
1000
Max
5
5
-
-
Synchronous DRAM
Min
7.5
2.5
2.5
1.5
0.8
10
Max
4.37
3
3
1
3.8
5.6
5.0
Rev. 1.22 August 2008
75
1000
Max
5.4
5.4
6
6
Volts/ns
Volts/ns
Volts/ns
Volts/ns
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Note
1,2
1,2
1,2
3
3
1
2
3
3
3
3
2

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