IS66WVE4M16BLL-70BLI ISSI, Integrated Silicon Solution Inc, IS66WVE4M16BLL-70BLI Datasheet - Page 21
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IS66WVE4M16BLL-70BLI
Manufacturer Part Number
IS66WVE4M16BLL-70BLI
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS66WVE4M16BLL-70BLI.pdf
(30 pages)
Specifications of IS66WVE4M16BLL-70BLI
Lead Free Status / Rohs Status
Compliant
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Rev.00C | March 2010
Table 9 . Asynchronous WRITE Cycle Timing Requirements
Notes:
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
WHZ
WPH
t
CPH
OW
AW
BW
CW
DW
WC
WR
DH
WP
AS
LZ
2. High-Z to Low-Z timings are tested with the circuit shown in Figure 9. The
3. WE# LOW must be limited to t
1. Low-Z to High-Z timings are tested with the circuit shown in Figure 9. The
Address setup Time
Address valid to end of write
Byte select to end of write
CE# HIGH time during write
Chip enable to end of Write
Data hold from write time
Data write setup time
Chip enable to Low-Z output
End write to Low-Z output
Write cycle time
Write to High-Z output
Write pulse width
Write pulse width HIGH
Write recovery time
High-Z timings measure a 100mV transition from either VOH or VOL toward VDDQ/2.
Low-Z timings measure a 100mV transition away from the High-Z (VDDQ/2) level toward
either VOH or VOL.
Parameter
CEM
www.issi.com
(8us)
- SRAM@issi.com
Min
70
70
70
23
10
70
46
10
0
5
0
5
0
-70
Max
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IS66WVE4M16BLL
Advanced Information
Notes
1
1
2
3
21