IS66WVE4M16BLL-70BLI ISSI, Integrated Silicon Solution Inc, IS66WVE4M16BLL-70BLI Datasheet - Page 8

• Manufacturer Part Number: IS66WVE4M16BLL-70BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS66WVE4M16BLL-70BLI

• Lead Free Status / Rohs Status: Compliant

Rev.00C | March 2010
Bus Operating Modes
Asynchronous Mode Operation
Figure 2. Asynchronous Read Operation
UB#/LB#
Address
DQ15
DQ0-
WE#
OE#
CE#
PSRAM products incorporates the industry-standard, asynchronous interface. This bus interface
supports asynchronous Read and WRITE operations as well as page mode READ operation for
enhanced bandwidth. The supported interface is defined by the value loaded into the CR.
PSRAM products power up in the asynchronous operating mode. This mode uses the industry-
standard SRAM control interface (CE#, OE#, WE#, and LB#/UB#).
READ operations are initiated by bringing CE#, OE#, and LB#/UB# LOW while keeping WE# HIGH
(see Figure 2). Valid data will be driven out of the I/Os after the specified access time has elapsed.
WRITE operations occur when CE#,WE#, and LB#/UB# are driven LOW (see Figure 3). During
WRITE operations, the level of OE# is a “Don’t Care”; WE# overrides OE#. The data to be written is
latched on the rising edge of CE#, WE#, or LB#/UB#, whichever occurs first. WE# LOW time must be
limited to tCEM.
www.issi.com
t
RC
= READ cycle Time
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Advanced Information
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