21143TD Intel, 21143TD Datasheet - Page 26

• Manufacturer Part Number: 21143TD
• Manufacturer: Intel

Specifications of 21143TD

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

21143
3.4.2
3.4.3
22
1. The PCI and CardBus clock frequency is from dc to 33 MHz; network operational with the PCI or CardBus clock from 20 MHz to
33 MHz.
System Bus Reset
System bus (PCI or CardBus) reset (rst_l) is an asynchronous signal that must be active for at least
10 system bus (PCI or CardBus) clock (pci_clk) cycles.
characteristics, and
PCI and CardBus Clock Specifications
The clock frequency range
the PCI and CardBus clock specification timing characteristics and the required measurement
points for both the 5.0-V and 3.3-V signaling environments.
clock specifications.
Trst
Symbol
Internal Reset
pci_clk
rst_l
rst_l pulse width
Parameter
Table 16
10 pci_clk Cycles
1
for PCI and CardBus is between 20 MHz and 33 MHz.
Table 16. Reset Timing Parameters
lists the reset signal limits.
Figure 3. Reset Timing Diagram
10*pci_clk
Minimum
33 pci_clk Cycles
Figure 3
Not applicable
Maximum
Table 17
shows the reset timing
lists the frequency-derived
Preliminary
pci_clk active
Condition
Figure 4
Datasheet
A5477-01
shows