HI-3584PQT-10 Holt Integrated Circuits, HI-3584PQT-10 Datasheet - Page 12

• Manufacturer Part Number: HI-3584PQT-10
• Manufacturer: Holt Integrated Circuits

Specifications of HI-3584PQT-10

• Operating Temperature Classification: Military
• Operating Temperature (max): 125C
• Package Type: PQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

AC ELECTRICAL CHARACTERISTICS
The HI-3584PCI and HI-3584PCT use a 44-pin plastic
chip-scale package. This package has a metal heat sink
pad on its bottom surface. This heat sink is electrically
connected to the die. To enhance thermal dissipation, the
VDD = 3.3V, GND = 0V, TA = Oper. Temp. Range and fclk=1MHz 0.1% with 60/40 duty cycle
HEAT SINK - CHIP-SCALE PACKAGE ONLY
REPEATER OPERATION TIMING
MASTER RESET PULSE WIDTH
ARINC DATA RATE AND BIT TIMING
CONTROL WORD TIMING
RECEIVER FIFO AND LABEL READ TIMING
TRANSMITTER FIFO AND LABEL WRITE TIMING
TRANSMISSION TIMING
Spacing -
Delay - ENTX HIGH to TXAOUT or TXBOUT: High Speed
Delay - ENTX HIGH to TXAOUT or TXBOUT: Low Speed
Spacing -
Delay - Start ARINC 32nd Bit to
PARAMETER
EN
EN
HIGH to next
HIGH to next
Setup - DATA BUS Valid to
Hold -
Delay - 32nd ARINC Bit to TX/R HIGH
Spacing between Label Write pulses
Spacing - TX/R HIGH to ENTX LOW
Setup - DATA BUS Valid to
Delay -
Delay -
Spacing -
Hold -
Delay - TX/R LOW to ENTX HIGH
CWSTR
Delay -
Delay -
EN
Delay -
EN
Delay -
Hold -
EN
EN
PL
LOW (Same ARINC Word)
Pulse Width -
PL2
LOW (Next ARINC Word)
Pulse Width -
LOW to DATA BUS Valid
HIGH to DATA BUS Hi-Z
HIGH to DATA BUS Hi-Z
HIGH to DATA BUS Hi-Z
PL2
Setup - SEL to
Hold - SEL to
D/R
EN
HOLT INTEGRATED CIRCUITS
Pulse Width -
PL
D/R
Spacing -
HIGH to ENTX HIGH
EN
HIGH to TX/R LOW
HIGH to
HIGH to
LOW: High Speed
LOW to
LOW to
CWSTR
EN1
Low Speed
PL1
PL1
D/R
+
EN
EN
PL
EN
EN
PL
CWSTR
HI-3584
or
or
or
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
EN2
PL2
PL2
12
heat sink can be soldered to matching circuit board pad.
The heat sink may be connected to VDD or left floating.
Do not connect heat sink pad to GND.
SYMBOL
t
t
t
t
t
t
t
t
t
READEN
t
t
ENDATA
DATAEN
t
t
t
t
t
t
t
t
CWSTR
CWSET
CWHLD
t
DWSET
DWHLD
ENTX/R
SELEN
ENSEL
ENDAT
ENDAT
D/REN
END/R
t
LABEL
PL2EN
DTX/R
TX/REN
ENEN
t
t
t
t
t
PL12
t
t
TX/R
ENPL
PLEN
D/R
D/R
t
EN
PL
MR
MIN
160
100
200
120
150
110
150
50
40
10
10
60
65
70
0
0
0
0
0
0
LIMITS
TYP
420
MAX
± 1%
128
520
180
240
200
16
80
50
25
UNITS
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
ns
ns
ns
ns