PEB20571FV3.1XT Infineon Technologies, PEB20571FV3.1XT Datasheet - Page 225
PEB20571FV3.1XT
Manufacturer Part Number
PEB20571FV3.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB20571FV3.1XT.pdf
(308 pages)
Specifications of PEB20571FV3.1XT
Lead Free Status / Rohs Status
Compliant
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6.2.6.10 LCLK0 Control Register
LCLK0 Control Register (GLCLK0)
Reset value: 0000
Note: ’x’ = unused bits, read as 0
.
LCLK0EN
LCLK0(1:0) LCLK0 Output Clock Rate
Data Sheet
15
7
x
x
LCLK0 Output Enable
0 =
1 =
Note: This option is valid only when LCLK0 is output. When LCLK0 is
00 =
01 =
10 =
11 =
H
14
x
6
x
input the frequency is determined externally.
LCLK0 is input (default)
LCLK0 is driven outward via LCLK0 pin
2.048 MHz (default)
4.096 MHz
8.192 MHz
16.384 MHz
13
5
x
x
12
4
x
x
read/write
208
11
3
x
x
LCLK0EN
10
x
2
Register Description
Address: D08A
LCLK0(1:0)
9
1
x
PEB 20570
PEB 20571
2003-07-31
8
x
0
H
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