PEB20571FV3.1XT Infineon Technologies, PEB20571FV3.1XT Datasheet - Page 250
PEB20571FV3.1XT
Manufacturer Part Number
PEB20571FV3.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB20571FV3.1XT.pdf
(308 pages)
Specifications of PEB20571FV3.1XT
Lead Free Status / Rohs Status
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6.2.11.2 PFS Control Register
PFS Control Register (CPFS)
Reset value: 0001
Note: ’x’ = unused bits, read as 0
.
PFS
Note: When the PFS is output, its frequency is always 8 kHz, therefore this bit should be
Data Sheet
left in its reset-value ('1') and not to be changed.
The direction of PFS and PDC: input (slave) or output (master) is determined by
the Master/Slave strap (DREQR pin) during reset.
15
7
x
x
PFS Frequency Selection
(Selectable in Slave mode when PFS is input; in Master mode PFS = 8 kHz)
0 =
1 =
H
14
6
x
x
PFS = 4 kHz
PFS = 8 kHz (default)
13
5
x
x
12
4
read/write
x
x
233
11
3
x
x
10
2
x
x
Register Description
Address: D081
9
x
1
x
PEB 20570
PEB 20571
2003-07-31
PFS
8
0
x
H
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