PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 167

• Manufacturer Part Number: PEF82902FV11XP
• Manufacturer: Lantiq

Specifications of PEF82902FV11XP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.9
4.9.1
The Operation Mode register determines the operating mode of the U-transceiver.
OPMODE
Reset value: 00
UCI
4.9.2
Via the U-transceiver C/I code Read register a microcontroller can access the C/I code
that is output from the state machine.
UCIR
Reset value: 00
4.9.3
The U-transceiver C/I code Write register allows a microcontroller to control the state of
the U-transceiver. To enable this function bit UCI in register OPMODE must be set to ’1’
before.
Data Sheet
7
0
7
0
Detailed U-Transceiver Registers
OPMODE - Operation Mode Register
UCIR - C/I Code Read Register
UCIW - C/I Code Write Register
Enable/Disable µP-control of C/I codes
0 =
1 =
H
H
UCI
6
6
0
µP control disabled - C/I codes are exchanged via IOM
Read access to register UCIR by the P is still possible
µP control enabled - C/I codes are exchanged via UCIR and UCIW
registers
In this case, the according C/I-channel on IOM
5
0
5
0
4
0
4
0
read*
read
155
)
/write
3
0
3
C/I code output
2
0
2
Register Description
®
-2 is idle ‘1111‘
Address:
Address:
1
0
1
PEF 82902
®
-2
2001-11-09
0
0
0
6D
60
H
H