CYNCP80192-BGC Cypress Semiconductor Corp, CYNCP80192-BGC Datasheet - Page 2

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CYNCP80192-BGC

Manufacturer Part Number
CYNCP80192-BGC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNCP80192-BGC

Lead Free Status / Rohs Status
Not Compliant

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CY
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1.0 OVERVIEW ...................................................................................................................................... 5
2.0 FEATURES ...................................................................................................................................... 5
3.0 FUNCTIONAL DESCRIPTION ......................................................................................................... 6
4.0 SIGNAL DESCRIPTION ................................................................................................................... 7
5.0 CLOCKS ........................................................................................................................................... 9
6.0 REGISTERS ..................................................................................................................................... 9
7.0 OPERATING REGISTERS ............................................................................................................. 11
8.0 NDC SUBSYSTEM POWER-UP INITIALIZATION PROCEDURE ................................................ 19
9.0 NOBL PIPELINED SSRAM INTERFACE MODE .......................................................................... 19
10.0 NOBL FLOWTHROUGH SSRAM INTERFACE MODE .............................................................. 21
11.0 SYNCBURST PIPELINED SSRAM INTERFACE (EARLY WRITE) ............................................ 21
12.0 SYNCBURST PIPELINED SSRAM INTERFACE MODE (LATE WRITE) ................................... 23
13.0 APPLICATION INFORMATION ................................................................................................... 23
14.0 INFORMATION ON EXTERNAL TRANSCEIVERS .................................................................... 25
15.0 JTAG (1149.1) TESTING ............................................................................................................. 26
16.0 ELECTRICAL CHARACTERISTICS ............................................................................................ 26
17.0 AC TIMING WAVEFORMS .......................................................................................................... 29
18.0 PINOUT DIAGRAM ...................................................................................................................... 30
19.0 ORDERING INFORMATION ........................................................................................................ 34
20.0 PACKAGE DRAWINGS ............................................................................................................... 35
Document #: 38-02043 Rev. *C
3.1 Configuration Registers ........................................................................................................... 6
3.2 Operating Registers .................................................................................................................. 6
3.3 Pipeline and Table Management and Bus Protocol Conversion Logic ............................... 6
3.4 NSE Interface ............................................................................................................................. 6
3.5 Associative SSRAM Interface .................................................................................................. 6
6.1 Coprocessor Interface Register .............................................................................................. 9
6.2 Configuration and Status Registers ...................................................................................... 10
7.1 Address Mapping .................................................................................................................... 12
7.2 Context Descriptor Organization ...........................................................................................12
7.3 Context Descriptor Commands ............................................................................................. 13
8.1
CYNCP80192 Reset Operation ................................................................................................................................ 19
TABLE OF CONTENTS
CYNCP80192
Page 2 of 37

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