CYNCP80192-BGC Cypress Semiconductor Corp, CYNCP80192-BGC Datasheet - Page 4

• Manufacturer Part Number: CYNCP80192-BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNCP80192-BGC

• Lead Free Status / Rohs Status: Not Compliant

CYNCP80192
LIST OF TABLES
Table 4-1. Search Coprocessor Pin Description ................................................................................ 7
Table 6-1. Register Partitions for Coprocessor Access .................................................................... 9
Table 6-2. Configuration and Status Registers Area ....................................................................... 10
Table 6-3. Configuration Register ..................................................................................................... 10
Table 6-4. Error and Status Register ................................................................................................. 11
Table 6-5. Error Codes ....................................................................................................................... 11
Table 6-6. Information Register Description .................................................................................... 11
Table 7-1. Operating Registers Addressing Mapping (ADR[9] = 1) ................................................ 12
Table 7-2. Context Descriptor Organization ..................................................................................... 13
Table 7-3. Descriptor Command ........................................................................................................ 13
Table 7-4. Read Command ................................................................................................................. 14
Table 7-5. Write Command ................................................................................................................. 14
Table 7-6. Search Data ....................................................................................................................... 15
Table 7-7. Move Command Parameters ............................................................................................15
Table 7-8. Swap Command Parameters ............................................................................................15
Table 7-9. SSRAM Data ...................................................................................................................... 16
Table 7-10. NSE Data, Mask, and Register Locations ..................................................................... 16
Table 7-11. Read Response at Result Register 0 ............................................................................. 16
Table 7-12. Data Read from NSE ....................................................................................................... 16
Table 7-13. Data Read from SSRAM .................................................................................................. 16
Table 7-14. Write/Move/Swap/Learn Results Register 0 ................................................................. 17
Table 7-15. Result Register 0 for Search Operation ........................................................................ 17
Table 7-16. Result Register 1 (Search Result Bit in Data Field = 0) ............................................... 17
Table 7-17. Result Register 1 (Search Result Bit in Data Field = 1) ............................................... 17
Table 7-18. Search Response in Result Register 0 (type I) ............................................................. 18
Table 7-19. Index Bits for NSEs ......................................................................................................... 18
Table 15-1. Test Access Port Controller Instructions ..................................................................... 26
Table 15-2. Test Access Port Device ID Register ............................................................................ 26
Table 16-1. Electrical Characteristics ............................................................................................... 26
Table 16-2. Capacitance ..................................................................................................................... 26
Table 16-3. Operating Conditions ..................................................................................................... 27
Table 16-4. AC Timing Parameters for Pipelined NoBL SSRAM and SyncBurst SSRAM ............ 27
Table 16-5. AC Timing Parameters for NoBL and Flow-Through SSRAM ..................................... 27
Table 18-1. CYNPC80192 Pinout Description ................................................................................... 30
Table 19-1. Ordering Information ...................................................................................................... 34
Document #: 38-02043 Rev. *C
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