DAC1405D750HW/C1,5 NXP Semiconductors, DAC1405D750HW/C1,5 Datasheet - Page 20

• Manufacturer Part Number: DAC1405D750HW/C1,5
• Description: IC DAC 14BIT SRL/SPI 100HTQFP
• Manufacturer: NXP Semiconductors

Specifications of DAC1405D750HW/C1,5

• Settling Time: 20ns
• Number Of Bits: 14
• Data Interface: Serial, SPI™
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 1.11W
• Operating Temperature: -45°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Conversion Rate: 750 MSPs
• Resolution: 14 bit
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1.11 W
• Minimum Operating Temperature: - 40 C
• Supply Current: 44 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5089

NXP Semiconductors
DAC1405D750
Product data sheet
Table 21.
Table 22.
Default settings are shown highlighted.
Table 23.
Table 24.
Table 25.
Default settings are shown highlighted.
Bit
7 to 6 DAC_A_GAIN_
5 to 0 DAC_A_
Bit
7
6
5 to 0 DAC_B_OFFSET[5:0]
Bit
Bit
7 to 6 DAC_B_GAIN_
5 to 0 DAC_B_
Bit
7 to 6 DAC_B_GAIN_
5 to 0 DAC_B_GAIN_
7 to 2 -
1
0
Symbol
MINUS_3DB
NOISE_SHPER
Symbol
COARSE[3:2]
OFFSET[11:6]
Symbol
DAC_B_PD
DAC_B_SLEEP
Symbol
COARSE[1:0]
FINE[5:0]
Symbol
COARSE[3:2]
OFFSET[11:6]
DAC_A_Cfg_3 register (address 0Bh) bit description
DAC_B_Cfg_1 register (address 0Ch) bit description
DAC_B_Cfg_2 register (address 0Dh) bit description
DAC_B_Cfg_3 register (address 0Eh) bit description
DAC_Cfg register (address 0Fh) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 7 September 2010
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
Access Value
R/W
R/W
Access Value Description
R/W
R/W
Access Value Description
R/W
R/W
Access Value Description
R/W
R/W
R/W
Access Value
-
R/W
R/W
-
-
-
-
-
-
-
0
1
0
1
-
0
1
0
1
less significant 2 bits for the DAC B gain setting
for coarse adjustment
the 6 bits for the DAC B gain setting for fine
adjustment
most significant 2 bits for the DAC B gain
setting for coarse adjustment
most significant 6 bits for the DAC B offset
DAC B power
DAC B Sleep mode
lower 6 bits for the DAC B offset
Description
most significant 2 bits for the DAC A gain
setting for coarse adjustment
most significant 6 bits for the DAC A offset
NCO gain
noise shaper
on
off
disabled
enabled
Description
reserved
unity
3 dB
disabled
enabled
DAC1405D750
© NXP B.V. 2010. All rights reserved.
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