AD5532ABC-3 Analog Devices Inc, AD5532ABC-3 Datasheet - Page 11

• Manufacturer Part Number: AD5532ABC-3
• Description: IC DAC 14BIT 32CH 74-CSPBGA
• Manufacturer: Analog Devices Inc

Specifications of AD5532ABC-3

• Rohs Status: RoHS non-compliant
• Settling Time: 22µs
• Number Of Bits: 14
• Data Interface: Serial
• Number Of Converters: 34
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 623mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 74-CSPBGA
• For Use With: EVAL-AD5532HSEBZ - BOARD EVAL FOR AD5532HSEVAL-AD5532EBZ - BOARD EVAL FOR AD5532

TERMINOLOGY
DAC MODE
Integral Nonlinearity (INL)
This is a measure of the maximum deviation from a straight
line passing through the endpoints of the DAC transfer
function. It is expressed as a percentage of full-scale span.
Differential Nonlinearity (DNL)
This is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
DNL of ±1 LSB maximum ensures monotonicity.
Offset
Offset is a measure of the output with all zeros loaded to the
DAC and OFFS_IN = 0. Because the DAC is lifted off the
ground by approximately 50 mV, this output is typically
Full-Scale Error
This is a measure of the output error with all 1s loaded to the
DAC. It is expressed as a percentage of full-scale range. See
Figure 8. It is calculated as
where
Output Settling Time
This is the time taken from when the last data bit is clocked into
the DAC until the output has settled to within ±0.39%.
OFFS_IN Settling Time
The time taken from a 0 V to 3 V step change in input voltage
on OFFS_IN until the output has settled to within ±0.39%.
Digital-to-Analog Glitch Impulse
This is the area of the glitch injected into the analog output
when the code in the DAC register changes state. It is specified
as the area of the glitch in nV-secs when the digital code is
changed by 1 LSB at the major carry transition (011 . . . 11 to
100 . . . 00 or 100 . . . 00 to 011 . . . 11).
Digital Crosstalk
This is the glitch impulse transferred to the output of one DAC
at midscale while a full-scale code change (all 1s to all 0s and
vice versa) is written to another DAC. It is expressed in nV-secs.
Analog Crosstalk
This is the area of the glitch transferred to the output (V
one DAC due to a full-scale change in the output (V
another DAC. The area of the glitch is expressed in nV-secs.
Digital Feedthrough
This is a measure of the impulse injected into the analog
outputs from the digital control inputs when the part is not
being written to, i.e., CS / SYNC is high. It is specified in nV-secs
and is measured with a worst-case change on the digital input
pins, for example, from all 0s to all 1s and vice versa.
V
Full
Ideal
Ideal
OUT
−
Gain
= Gain
Gain
Scale
=
=
Error
7
×
. 3
for
50
52
mV
for
AD
=
V
AD
OUT
5532
5532
(
Full
−
2
−
Scale
−
/ 1
)
−
−
/ 3
(
Ideal
−
5
Gain
×
REFIN
OUT
) of
OUT
)
) of
Rev. D | Page 11 of 20
Output Noise Spectral Density
This is a measure of internally generated random noise.
Random noise is characterized as a spectral density (voltage per
root Hertz). It is measured by loading all DACs to midscale and
measuring noise at the output. It is measured in nV/(√ Hz ).
Output Temperature Coefficient
This is a measure of the change in analog output with changes
in temperature. It is expressed in ppm/°C.
DC Power-Supply Rejection Ratio (PSRR)
DC power-supply rejection ratio is a measure of the change in
analog output for a change in supply voltage (V
expressed in dBs. V
DC Crosstalk
This is the DC change in the output level of one DAC at
midscale in response to a full-scale code change (all 0s to all 1s
and vice versa) and an output change of all other DACs. It is
expressed in μV.
ISHA MODE
V
The measure of the maximum deviation from a straight line
passing through the endpoints of the V
function. It is expressed as a percentage of the full-scale span.
Offset Error
This is a measure of the output error when V
with V
Offset error is a measure of the difference between V
and V
negative. See Figure 9.
Gain Error
This is a measure of the span error of the analog channel. It is
the deviation in slope of the transfer function expressed in mV.
See Figure 9. It is calculated as
where:
AC Crosstalk
This is the area of the glitch that occurs on the output of one
channel while another channel is acquiring. It is expressed in
nV-secs.
Output Settling Time
This is the time taken from when BUSY goes high to when the
output has settled to ±0.018%.
Acquisition Time
This is the time taken for the V
length of time that BUSY stays low.
IN
Gain Error =
Actual Full-Scale Output − Ideal Full-Scale Output − Offset Error
V
Ideal
to V
OUT
OUT
IN
OUT
Full
=
= 70 mV:
(ideal). It is expressed in mV and can be positive or
(
Gain
Nonlinearity
−
Scale
×
70
Output
DD
) (
−
and V
(
Gain
=
Gain
SS
are varied ±5%.
−
IN
1
)
input to be acquired. It is the
×
×
V
. 2
OFFS
96
IN
−
_ IN
versus V
(
(
Gain
)
IN
mV
= 70 mV. Ideally,
DD
−
and V
OUT
1
)
×
AD5532
OUT
transfer
V
OFFS
SS
(actual)
). It is
_
IN
)