ED DDR3 1G PCH9000 Samsung Semiconductor, ED DDR3 1G PCH9000 Datasheet - Page 23

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ED DDR3 1G PCH9000

Manufacturer Part Number
ED DDR3 1G PCH9000
Description
Manufacturer
Samsung Semiconductor
Type
DDR3 SDRAMr
Datasheet

Specifications of ED DDR3 1G PCH9000

Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
20ns
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
160mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
K4B1G04(08/16)46E
9.7.1 Output Drive Temperature and Voltage Sensitivity
If temperature and/or voltage change after calibration, the tolerance limits widen according to table 23 and 24.
∆T = T - T(@calibration); ∆V = V
[ Table 23 ] Output Driver Sensitivity Definition
[ Table 24 ] Output Driver Voltage and Temperature Sensitivity
9.8 On-Die Termination (ODT) Levels and I-V Characteristics
On-Die Termination effective resistance RTT is defined by bits A9, A6 and A2 of MR1 register.
ODT is applied to the DQ,DM, DQS/DQS and TDQS,TDQS (x8 devices only) pins.
A functional representation of the on-die termination is shown below. The individual pull-up and pull-down resistors (RTTpu and RTTpd) are defined as
follows :
RTTpu =
RTTpd =
*dR
RONPU@V
RONPD@
RON@V
ON
Speed Bin
dR
dR
dR
dR
dR
dR
dT and dR
ON
ON
ON
ON
ON
ON
dTM
dVM
dTH
dVH
dTL
dVL
OMDC
VOLDC
OHDC
V
DDQ
ON
l Iout l
V
l Iout l
OUT
dV are not subject to production test but are verified by design and characterization
-V
OUT
DDQ
- V
Figure 12. On-Die Termination : Definition of Voltages and Currents
DDQ
0.9 - dR
0.6 - dR
0.6 - dR
On-Die Termination : Definition of Voltages and Currents
under the condition that RTTpd is turned off
under the condition that RTTpu is turned off
(@calibration); V
circuitry
Min
other
RCV,
0
0
0
0
0
0
like
To
...
ON
ON
ON
dTM * |
dTH * |
dTL * |
800/1066/1333
Min
∆T| - dR
∆T| - dR
∆T| - dR
Chip in Termination Mode
DD
RTT
RTT
Ipd
Ipu
Page 23 of 61
ON
ON
ON
= V
dVL * |∆V|
dVH * |∆V|
dVM * |∆V|
Pu
Pd
DDQ
Max
0.15
0.15
0.15
1.5
1.5
1.5
ODT
1.1 + dR
1.1 + dR
1.1 + dR
Min
Iout
Iout=Ipd-Ipu
0
0
0
0
0
0
ON
ON
ON
dTM * |
dTH * |
dTL * |
V
DQ
V
DDQ
SSQ
V
OUT
Max
1600
∆T| + dR
∆T| + dR
∆T| + dR
1Gb DDR3 SDRAM
ON
ON
ON
Rev. 1.0 February 2009
dVH * |∆V|
dVM * |∆V|
dVL * |∆V|
Max
0.13
0.13
0.13
1.5
1.5
1.5
RZQ/7
RZQ/7
RZQ/7
Units
%/mV
%/mV
%/mV
Units
%/°C
%/°C
%/°C

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