MT46H32M32LFCM-75 IT:A TR Micron Technology Inc, MT46H32M32LFCM-75 IT:A TR Datasheet - Page 24

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MT46H32M32LFCM-75 IT:A TR

Manufacturer Part Number
MT46H32M32LFCM-75 IT:A TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr

Specifications of MT46H32M32LFCM-75 IT:A TR

Organization
32Mx32
Density
1Gb
Address Bus
13b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Electrical Specifications – AC Operating Conditions
Table 10: Electrical Characteristics and Recommended AC Operating Conditions
Notes 1–9 apply to all the parameters in this table; V
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Parameter
Access window
of DQ from
CK/CK#
Clock cycle time CL = 3
CK high-level width
CK low-level width
CKE minimum pulse width
(high and low)
Auto precharge write recovery
+ precharge time
DQ and DM input hold time
relative to DQS (fast slew rate)
DQ and DM input hold time
relative to DQS (slow slew rate)
DQ and DM input setup time
relative to DQS (fast slew rate)
DQ and DM input setup time
relative to DQS (slow slew rate)
DQ and DM input pulse width
(for each input)
Access window
of DQS from
CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS–DQ skew, DQS to last DQ
valid, per group, per access
WRITE command to first DQS
latching transition
DQS falling edge from CK
rising – hold time
DQS falling edge to CK rising –
setup time
Data valid output window
(DVW)
Half-clock period
CL = 3
CL = 2
CL = 2
CL = 3
CL = 2
Symbol
t
DQSCK
t
t
t
t
t
DQSQ
DQSH
t
DIPW
t
t
DQSL
DQSS
t
t
t
t
t
t
t
DAL
DSH
t
CKE
t
t
DH
DH
DSS
n/a
DS
DS
AC
CK
CH
HP
CL
f
s
f
s
Min
0.45
0.45
0.75
t
t
t
2.0
2.0
0.6
0.7
0.6
0.7
1.8
2.0
2.0
0.4
0.4
0.2
0.2
QH -
CH,
12
CL
5
1
Electrical Specifications – AC Operating Conditions
-5
t
DQSQ
DD
Max
0.55
0.55
1.25
5.0
6.5
5.0
6.5
0.6
0.6
0.4
/V
DDQ
24
= 1.70–1.95V
Min
0.45
0.45
0.75
t
t
t
2.0
2.0
5.4
0.6
0.7
0.6
0.7
1.9
2.0
2.0
0.4
0.4
0.2
0.2
QH -
CH,
12
CL
1
-54
t
DQSQ
Max
0.55
0.55
0.45
1.25
1Gb: x16, x32 Mobile LPDDR SDRAM
5.0
6.5
5.0
6.5
0.6
0.6
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Min
0.45
0.45
0.75
t
t
2.0
2.0
0.6
0.7
0.6
0.7
2.1
2.0
2.0
0.4
0.4
0.2
0.2
CH,
t
QH -
12
CL
6
1
-6
t
DQSQ
Max
0.55
0.55
0.45
1.25
5.5
6.5
5.5
6.5
0.6
0.6
Min
0.45
0.45
0.75
t
t
2.0
2.0
7.5
0.8
0.9
0.8
0.9
1.8
2.0
2.0
0.4
0.4
0.2
0.2
t
QH -
CH,
12
CL
1
© 2007 Micron Technology, Inc. All rights reserved.
-75
t
DQSQ
Max
0.55
0.55
1.25
6.0
6.5
6.0
6.5
0.6
0.6
0.6
Unit
t
t
t
t
t
t
t
t
ns
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
13, 14,
13, 14,
Notes
13, 17
10
11
12
15
15
16
17
18

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